H01L2224/27013

Package with underfill containment barrier

An apparatus is provided which comprises: a substrate, a die site on the substrate to couple with a die, a die side component site on the substrate to couple with a die side component, and a raised barrier on the substrate between the die and die side component sites to contain underfill material disposed at the die site, wherein the raised barrier comprises electroplated metal. Other embodiments are also disclosed and claimed.

PACKAGE STRUCTURE FOR POWER CONVERTER AND MANUFACTURE METHOD THEREOF
20210296213 · 2021-09-23 ·

A package structure of a power converter, can include: a die pad; an insulation adhesive layer and a conductive adhesive layer on the die pad; a control circuit die on the insulation adhesive layer, where the insulation adhesive layer comprises a first insulation adhesive layer on a back surface of the control circuit die, and a second insulation adhesive on a surface of the die pad, where the first insulation adhesive layer is connected to the second insulation adhesive layer; and a power device die on the conductive adhesive layer, where the insulation adhesive layer is separated from the conductive adhesive layer.

PRINTED CIRCUIT BOARD AND MANUFACTURING METHOD THEREOF
20210282262 · 2021-09-09 · ·

Provided is a printed circuit board using thermally and electrically conductive layer, and a manufacturing method thereof The manufacturing method for mounting a plurality of elements includes forming an electrode layer on a substrate of a PCB, forming a photo solder resist (PSR) layer in a patterned manner on a first area of the electrode layer; forming a conductive layer on the PSR layer in the patterned manner, the conductive layer being configured to conduct heat and static electricity; and mounting a plurality of elements on a second area of the side of the PCB, the second area being different from the first area.

Semiconductor device having a cooling body with a groove

A semiconductor device includes a semiconductor module having a heat conductive portion formed of metal and also having a molded resin having a surface at which the heat conductive portion is exposed, a cooling body secured to the semiconductor module by means of bonding material, and heat conductive material formed between and thermally coupling the heat conductive portion and the cooling body.

Packaged semiconductor devices and methods of packaging thereof

Packaging methods for semiconductor devices and methods of packaging thereof are disclosed. In some embodiments, a device includes a packaging apparatus and contact pads disposed on the packaging apparatus. The contact pads are arranged in an array of rows and columns. The contact pads include first contact pads proximate a perimeter region of the packaging apparatus and second contact pads disposed in an interior region of the packaging apparatus. A dam structure that is continuous is disposed around the second contact pads. The contact pads comprise a mounting region for a semiconductor device.

Package structure for power converter and manufacture method thereof

A package structure of a power converter, can include: a die pad; an insulation adhesive layer and a conductive adhesive layer on the die pad; a control circuit die on the insulation adhesive layer, where the insulation adhesive layer comprises a first insulation adhesive layer on a back surface of the control circuit die, and a second insulation adhesive on a surface of the die pad, where the first insulation adhesive layer is connected to the second insulation adhesive layer; and a power device die on the conductive adhesive layer, where the insulation adhesive layer is separated from the conductive adhesive layer.

SEMICONDUCTOR PACKAGES HAVING A DAM STRUCTURE

A semiconductor package is disclosed. The disclosed semiconductor package includes a substrate having bonding pads at an upper surface thereof, a lower semiconductor chip, at least one upper semiconductor chip disposed on the lower semiconductor chip, and a dam structure having a closed loop shape surrounding the lower semiconductor chip. The dam structure includes narrow and wide dams disposed between the lower semiconductor chip and the bonding pads. The wide dam has a greater inner width than the narrow dam. The semiconductor packages further includes an underfill disposed inside the dam structure and being filled between the substrate and the lower semiconductor chip.

MODIFIED LEADFRAME DESIGN WITH ADHESIVE OVERFLOW RECESSES

The present disclosure is directed to a leadframe having a recess in a body of the leadframe to collect glue overflowing from the manufacturing process of coupling a semiconductor die to the leadframe. The recess extends beneath an edge of the semiconductor die so that any tendency of the glue to adhere to the semiconductor die is counteracted by a tendency of the glue to adhere to a wall of the recess and at least partially fill the volume of the recess. In addition, the recess for collecting adhesive may also form a mold lock on an edge of the leadframe, the mold lock providing a more durable connection between the leadframe and an encapsulant during physical and temperature stresses.

Semiconductor packages and method of manufacturing the same

Semiconductor packages and methods of forming the same are disclosed. a semiconductor package includes a die and an underfill. The die is disposed over a surface and includes a first sidewall. The underfill encapsulates the die. The underfill includes a first underfill fillet on the first sidewall, and in a cross-sectional view, a second sidewall of the first underfill fillet has a turning point.

Printed circuit board and manufacturing method thereof
11039532 · 2021-06-15 · ·

Provided is a printed circuit board using thermally and electrically conductive layer, and a manufacturing method thereof. The manufacturing method for mounting a plurality of elements includes forming an electrode layer on a substrate of a PCB, forming a photo solder resist (PSR) layer in a patterned manner on a first area of the electrode layer; forming a conductive layer on the PSR layer in the patterned manner, the conductive layer being configured to conduct heat and static electricity; and mounting a plurality of elements on a second area of the side of the PCB, the second area being different from the first area.