H01L2224/27602

Semiconductor device and semiconductor device manufacturing method

Provided are a semiconductor device manufacturing method and semiconductor device such that manufacturing can be simplified and the thickness of the semiconductor device can be reduced. The semiconductor device includes an insulated circuit substrate having on one main surface thereof a first metal layer and a second metal layer, a metal plate conductively connected to the first metal layer, a first semiconductor element including on front and rear surfaces thereof a plurality of metal electrodes, a first insulating member disposed on a side surface of the first semiconductor element, a second insulating member disposed on the first insulating member and on the first semiconductor element, and a third metal layer, in which at least one portion thereof is disposed on the second insulating member and which conductively connects the metal electrode of the first semiconductor element and the second metal layer on the insulated circuit substrate.

Methods of manufacturing a semiconductor device

In a method for fabricating a semiconductor, a first conductive pattern structure partially protruding upwardly from first insulating interlayer is formed in first insulating interlayer. A first bonding insulation layer pattern covering the protruding portion of first conductive pattern structure is formed on first insulating interlayer. A first adhesive pattern containing a polymer is formed on first bonding insulation layer pattern to fill a first recess formed on first bonding insulation layer pattern. A second bonding insulation layer pattern covering the protruding portion of second conductive pattern structure is formed on second insulating interlayer. A second adhesive pattern containing a polymer is formed on second bonding insulation layer pattern to fill a second recess formed on second bonding insulation layer pattern. The first and second adhesive patterns are melted. The first and second substrates are bonded with each other so that the conductive pattern structures contact each other.

Capacitive Coupling of Integrated Circuit Die Components
20170092620 · 2017-03-30 · ·

Capacitive coupling of integrated circuit die components and other conductive areas is provided. Each component to be coupled has a surface that includes at least one conductive area, such as a metal pad or plate. An ultrathin layer of dielectric is formed on at least one surface to be coupled. When the two components, e.g., one from each die, are permanently contacted together, the ultrathin layer of dielectric remains between the two surfaces, forming a capacitor or capacitive interface between the conductive areas of each respective component. The ultrathin layer of dielectric may be composed of multiple layers of various dielectrics, but in one implementation, the overall thickness is less than approximately 50 nanometers. The capacitance per unit area of the capacitive interface formed depends on the particular dielectric constants K of the dielectric materials employed in the ultrathin layer and their respective thicknesses. Electrical and grounding connections can be made at the edge of the coupled stack.

SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD

Provided are a semiconductor device manufacturing method and semiconductor device such that manufacturing can be simplified and the thickness of the semiconductor device can be reduced. The semiconductor device includes an insulated circuit substrate having on one main surface thereof a first metal layer and a second metal layer, a metal plate conductively connected to the first metal layer, a first semiconductor element including on front and rear surfaces thereof a plurality of metal electrodes, a first insulating member disposed on a side surface of the first semiconductor element, a second insulating member disposed on the first insulating member and on the first semiconductor element, and a third metal layer, in which at least one portion thereof is disposed on the second insulating member and which conductively connects the metal electrode of the first semiconductor element and the second metal layer on the insulated circuit substrate.

POWER SEMICONDUCTOR, MOLDED MODULE, AND METHOD
20250226346 · 2025-07-10 ·

A power semiconductor having a power semiconductor switch. The power semiconductor switch is cuboidal and has a switching path terminal on one side, a further switching path terminal on a side opposite thereto, and a control terminal for switching the power semiconductor switch. The control terminal is formed at a distance from the switching path terminal, on the side of the switching path terminal. The power semiconductor has a control contact element, connected to the control terminal, for the control terminal, a contact element connected to the switching path terminal, and a molded housing. A part of the surface is covered by the molding compound. An outward-facing contact surface of the contact elements can be contacted from the outside. The power semiconductor switch has a further switching path terminal which can be contacted from the outside directly.

Method of repairing a display panel and repaired display panel

A method of repairing a display panel and a repaired display panel are provided. The display panel includes a panel substrate, a plurality of micro LEDs arranged on the panel substrate, and a molding member covering the plurality of micro LEDs. The molding member includes a first molding member and a second molding member disposed in a region surrounded by the first molding member. The second molding member has a composition or a shape different from that of the first molding member, and the second molding member surrounds at least one side surface of the plurality of micro LEDs.