Patent classifications
H01L2224/27618
Package structure and bonding method thereof
A package structure includes a first substrate, a second substrate, a plurality of conductive pillars and an adhesive layer. The first substrate includes a plurality of vias and a plurality of pads. The pads are disposed on the first substrate, and fill the vias. The second substrate is disposed opposite to the first substrate. Each conductive pillar electrically connects each pad and the second substrate, and the adhesive layer fills the gaps between the conductive pillars. A bonding method of the package structure is also provided.
MICRO-LED CHIPS AND METHODS FOR MANUFACTURING THE SAME AND DISPLAY DEVICES
The present disclosure relates to micro-LED chips, methods for manufacturing the same, and display devices. The micro-LED chip includes: a driving backplane including at least one first electrode, a groove being provided above the first electrode, and the first electrode being located at a bottom of the groove; the groove being filled with a conductive material, and the conductive material being obtained by curing a corresponding conductive ink; and a light emitting chip including at least one second electrode; and the first electrode is connected to the second electrode through the conductive material.
Bond materials with enhanced plasma resistant characteristics and associated methods
Several embodiments of the present technology are directed to bonding sheets having enhanced plasma resistant characteristics, and being used to bond to semiconductor devices. In some embodiments, a bonding sheet in accordance with the present technology comprises a base bond material having one or more thermal conductivity elements embedded therein, and one or more etched openings formed around particular regions or corresponding features of the adjacent semiconductor components. The bond material can include PDMS, FFKM, or a silicon-based polymer, and the etch resistant components can include PEEK, or PEEK-coated components.
MODULE STRUCTURES WITH COMPONENT ON SUBSTRATE POST
A module structure comprises a patterned substrate having a substrate surface and comprising a substrate post protruding from the substrate surface. A component is disposed on the substrate post. The component has a component top side and a component bottom side opposite the component top side. The component bottom side is disposed on the substrate post. The component extends over at least one edge of the substrate post. One or more component electrodes are disposed on the component.
MODULE STRUCTURES WITH COMPONENT ON SUBSTRATE POST
A module structure comprises a patterned substrate having a substrate surface and comprising a substrate post protruding from the substrate surface. A component is disposed on the substrate post. The component has a component top side and a component bottom side opposite the component top side. The component bottom side is disposed on the substrate post. The component extends over at least one edge of the substrate post. One or more component electrodes are disposed on the component.
CAVITY STRUCTURES
A cavity structure comprises a cavity substrate comprising a substrate surface, one or more cavity walls extending from the substrate surface, a cap disposed on the one or more cavity walls, and at least a portion of a module tether physically attached to the cavity substrate. The cavity substrate, the cap, and the one or more cavity walls form a cavity enclosing a volume, for example enclosing a vacuum, air, an added gas, or a liquid. The cavity structure can be a micro-transfer printable structure provided on a cavity structure source wafer. A plurality of cavity structures can be disposed on a destination substrate, for example by transfer printing, dry contact printing, or micro-transfer printing.
CAVITY STRUCTURES
A cavity structure comprises a cavity substrate comprising a substrate surface, one or more cavity walls extending from the substrate surface, a cap disposed on the one or more cavity walls, and at least a portion of a module tether physically attached to the cavity substrate. The cavity substrate, the cap, and the one or more cavity walls form a cavity enclosing a volume, for example enclosing a vacuum, air, an added gas, or a liquid. The cavity structure can be a micro-transfer printable structure provided on a cavity structure source wafer. A plurality of cavity structures can be disposed on a destination substrate, for example by transfer printing, dry contact printing, or micro-transfer printing.
CAMERA ASSEMBLY AND PACKAGING METHOD THEREOF, LENS MODULE, AND ELECTRONIC DEVICE
The present disclosure provides a method for packaging a camera assembly. The method includes: providing a photosensitive chip; mounting an optical filter on the photosensitive chip; temporarily bonding the photosensitive chip and functional components on a carrier substrate, where the photosensitive chip has soldering pads facing away from the carrier substrate and the functional components have soldering pads facing toward the carrier substrate; forming an encapsulation layer covering the carrier substrate, the photosensitive chip, and the functional components, and exposing the optical filter; after the encapsulation layer is formed, removing the carrier substrate; and after the carrier substrate is removed, forming a redistribution layer structure on a side of the encapsulation layer facing away from the optical filter to electrically connect the soldering pads of the photosensitive chip with the soldering pads of the functional components.
CAMERA ASSEMBLY AND PACKAGING METHOD THEREOF, LENS MODULE, ELECTRONIC DEVICE
The present disclosure provides a camera assembly and a packaging method thereof, a lens module, and an electronic device. The packaging method of the camera assembly includes: providing a carrier substrate and forming a redistribution layer (RDL) structure on the carrier substrate; providing functional components having solder pads; forming a photosensitive unit, including a photosensitive chip and an optical filter mounted on the photosensitive chip, that the photosensitive chip has solder pads facing the optical filter; temporarily bonding the optical filter of the photosensitive unit with the carrier substrate, and placing the functional components on the RDL structure, that each of the solder pads of the photosensitive chip and the solder pads of the functional components faces the RDL structure and electrically connects with the RDL structure; forming an encapsulation layer covering the carrier substrate, that the encapsulation layer is coplanar with a highest top of the photosensitive chip and the functional components; and removing the carrier substrate.
WAFER-LEVEL PACKAGING METHODS USING A PHOTOLITHOGRAPHIC BONDING MATERIAL
A wafer-level packaging method using a photolithographic bonding material includes providing a base substrate; providing a plurality of first chips; forming a photolithographic bonding layer on the base substrate or on the first chips; forming a plurality of first vias in the photolithographic bonding layer; pre-bonding the first chips to the base substrate through the photolithographic bonding layer with each first chip corresponding to a first via; using a thermal compression bonding process to bond the first chips to the base substrate such that an encapsulation material fills between adjacent first chips and covers the first chips and the base substrate; etching the base substrate to form a plurality of second vias through the base substrate with each second via connected to a first via to form a first conductive via; and forming a first conductive plug in the first conductive via to electrically connect to a corresponding first chip.