The present invention relates to transient liquid phase sinter pastes for electronic interconnects, and sinter paste application and processing methods.

An Ag underlayer-attached metallic member includes a metallic member joined with a body to be joined and an Ag underlayer formed on a joining surface of the metallic member with the body to be joined, the Ag underlayer includes a glass layer formed on a metallic member side and an Ag layer laminated on the glass layer, and an area proportion of voids in an Ag layer surface of the Ag underlayer is 25% or less.

An Ag underlayer-attached metallic member includes a metallic member joined with a body to be joined and an Ag underlayer formed on a joining surface of the metallic member with the body to be joined, the Ag underlayer includes a glass layer formed on a metallic member side and an Ag layer laminated on the glass layer, and an area proportion of voids in an Ag layer surface of the Ag underlayer is 25% or less.

An optical sensor module includes a transparent lid spaced apart from the optical sensor die by a protective dam. The dam can be formed by photosensitive epoxy materials that can be patterned using a photolithography process. The epoxy materials can change between liquid and solid phases during assembly, and then can be fully hardened by curing. The protective dam can be formed as a single layer, or as a multi-layer stack of epoxy materials, in which the layers may have different properties. In some implementations, the epoxy dam acts as a spacer that provides a substantially uniform gap to minimize a tilt angle of the transparent lid with respect to the optical sensor.

A manufacturing method for a package device includes a chip preparation step of preparing a device chip that includes an adhesive layer, a mounting substrate preparation step of preparing a mounting substrate that has a chip adhesion region to which the device chip is to be adhered, an electrode portion to be connected to the device chip, and a stepped portion formed between the chip adhesion region and the electrode portion, a mounting step of adhering the device chip to the chip adhesion region of the mounting substrate, a hardening step of hardening the adhesive layer, a connection step of electrically connecting the device chip and the electrode portion by a wire, and a molding step of covering the device chip and the wire with mold resin.

A manufacturing method for a package device includes a chip preparation step of preparing a device chip that includes an adhesive layer, a mounting substrate preparation step of preparing a mounting substrate that has a chip adhesion region to which the device chip is to be adhered, an electrode portion to be connected to the device chip, and a stepped portion formed between the chip adhesion region and the electrode portion, a mounting step of adhering the device chip to the chip adhesion region of the mounting substrate, a hardening step of hardening the adhesive layer, a connection step of electrically connecting the device chip and the electrode portion by a wire, and a molding step of covering the device chip and the wire with mold resin.

The present invention relates to a method for manufacturing a system in package having several layers, including for each current layer realization of a dielectric substrate by an additive manufacturing technique, deposition of an adhesive in receiving zones, deposition of electronic components in the corresponding receiving zones, deposition of interconnection elements between the electronic components, creation of at least one interconnection with an adjacent layer, encapsulation of the current layer with filler material, the filler material forming an outer surface, and preparation of the outer surface for receiving the next layer.

A method for fabricating a semiconductor device includes providing a die with a metallization layer including a first metal with a high melting point; providing a die carrier including a second metal with a high melting point; providing a solder material including a third metal with a low melting point; providing a layer of a fourth metal with a high melting point on the semiconductor die or the die carrier; and soldering the semiconductor die to the die carrier and creating: a first intermetallic compound between the semiconductor die and the die carrier and including the first metal and the third metal; a second intermetallic compound between the first intermetallic compound and the die carrier and including the second metal and the third metal; and precipitates of a third intermetallic compound between the first intermetallic compound and the second intermetallic compound and including the third metal and the fourth metal.

A method for fabricating a semiconductor device includes providing a die with a metallization layer including a first metal with a high melting point; providing a die carrier including a second metal with a high melting point; providing a solder material including a third metal with a low melting point; providing a layer of a fourth metal with a high melting point on the semiconductor die or the die carrier; and soldering the semiconductor die to the die carrier and creating: a first intermetallic compound between the semiconductor die and the die carrier and including the first metal and the third metal; a second intermetallic compound between the first intermetallic compound and the die carrier and including the second metal and the third metal; and precipitates of a third intermetallic compound between the first intermetallic compound and the second intermetallic compound and including the third metal and the fourth metal.

An electronic device includes a drive substrate (a pressure chamber substrate and a vibration plate) including a piezoelectric element and electrode wirings related to driving of the piezoelectric element formed thereon, and a sealing plate bonded thereto, the electrode wirings are made of wiring metal containing gold (Au) on the drive substrate through an adhesion layer which is a base layer, and has a removed portion in which a portion of the wiring metal in a region containing a part bonded to a bonding resin is removed and the adhesion layer is exposed.