Patent classifications
H01L2224/325
Package-on-package semiconductor device
Some embodiments relate to a semiconductor device. The semiconductor device includes a substrate. A first die is coupled beneath a lower surface of the substrate. A second die is coupled beneath the lower surface of the substrate and is disposed over the first die. A thermal contact pad is arranged beneath a lower surface of the second die and an upper surface of the first die. The thermal contact pad thermally isolates the first die from the second die.
SEMICONDUCTOR CHIP, METHOD FOR MOUNTING SEMICONDUCTOR CHIP, AND MODULE IN WHICH SEMICONDUCTOR CHIP IS PACKAGED
A semiconductor chip includes a single-crystal substrate and a metal electrode on the bottom surface of the substrate. The metal electrode has a region in which a first metal is exposed and a region in which a second metal is exposed, the second metal having a standard electrode potential different from that of the first metal.
SEMICONDUCTOR CHIP, METHOD FOR MOUNTING SEMICONDUCTOR CHIP, AND MODULE IN WHICH SEMICONDUCTOR CHIP IS PACKAGED
A semiconductor chip includes a single-crystal substrate and a metal electrode on the bottom surface of the substrate. The metal electrode has a region in which a first metal is exposed and a region in which a second metal is exposed, the second metal having a standard electrode potential different from that of the first metal.
Dual solder layer for fluidic self assembly and electrical component substrate and method employing same
A dual solder layer for fluidic self assembly, an electrical component substrate, and method employing same is described. The dual solder layer comprises a layer of a self-assembly solder disposed on a layer of a base solder which is disposed on the solder pad of an electrical component substrate. The self-assembly solder has a liquidus temperature less than a first temperature and the base solder has a solidus temperature greater than the first temperature. The self-assembly solder liquefies at the first temperature during a fluidic self assembly method to cause electrical components to adhere to the substrate. After attachment, the substrate is removed from the bath and heated so that the base solder and self-assembly solder combine to form a composite alloy which forms the final electrical solder connection between the component and the solder pad on the substrate.
HIGH RELIABILITY WAFER LEVEL SEMICONDUCTOR PACKAGING
Implementations of semiconductor packages may include: a semiconductor wafer, a glass lid fixedly coupled to a first side of the semiconductor die by an adhesive, a redistribution layer coupled to a second side of the semiconductor die, and a plurality of ball mounts coupled to the redistribution layer on a side of the redistribution layer coupled to the semiconductor die. The adhesive may be located in a trench around a perimeter of the semiconductor die and located in a corresponding trench around a perimeter of the glass lid.
Via and trench filling using injection molded soldering
A method includes forming one or more trenches in a first substrate, forming one or more vias in a second substrate, aligning at least a first trench in the first substrate with at least a first via in the second substrate, and sealing the first substrate to the second substrate by filling the first via and the first trench with solder material using injection molded soldering.
VIA AND TRENCH FILLING USING INJECTION MOLDED SOLDERING
A method includes forming one or more vias in a substrate, forming a first photoresist layer on a top surface of the substrate and a second photoresist layer on a bottom surface of the substrate, patterning the first photoresist layer and the second photoresist layer to remove at least a first portion of the first photoresist layer and at least a second portion of the second photoresist layer, filling the one or more vias, the first portion and the second portion with solder material using injection molded soldering, and removing remaining portions of the first photoresist layer and the second photoresist layer.
VIA AND TRENCH FILLING USING INJECTION MOLDED SOLDERING
A method includes forming one or more trenches in a first substrate, forming one or more vias in a second substrate, aligning at least a first trench in the first substrate with at least a first via in the second substrate, and sealing the first substrate to the second substrate by filling the first via and the first trench with solder material using injection molded soldering.
VIA AND TRENCH FILLING USING INJECTION MOLDED SOLDERING
A method includes forming one or more vias in a substrate, forming at least one liner on at least one sidewall of at least one of the vias, and filling said at least one via with solder material using injection molded soldering. The at least one liner may comprise a solder adhesion layer, a barrier layer, or a combination of a barrier layer and a solder adhesion layer.
High reliability wafer level semiconductor packaging
Implementations of semiconductor packages may include: a semiconductor wafer, a glass lid fixedly coupled to a first side of the semiconductor die by an adhesive, a redistribution layer coupled to a second side of the semiconductor die, and a plurality of ball mounts coupled to the redistribution layer on a side of the redistribution layer coupled to the semiconductor die. The adhesive may be located in a trench around a perimeter of the semiconductor die and located in a corresponding trench around a perimeter of the glass lid.