H01L2224/325

Semiconductor packaging containing sintering die-attach material

Sintering die-attach materials provide a lead-free solution for semiconductor packages with superior electrical, thermal and mechanical performance to prior art alternatives. Wafer-applied sintering materials form a metallurgical bond to both semiconductor die and adherends as well as throughout the die-attach joint and do not remelt at the original process temperature. Application to either one or both sides of the wafer, as well as paste a film application are disclosed.

VERTICALLY INTEGRATED WAFERS WITH THERMAL DISSIPATION
20170040295 · 2017-02-09 · ·

Technologies are generally described related to three-dimensional integration of integrated circuits (ICs) with spacing for heat dissipation. According to some examples, a self-aligned silicide may be formed in a temporary silicon layer and removed subsequent to bonding of the wafers to achieve improved contact between the combined ICs and enhanced heat dissipation through added spacing between the ICs.

VERTICALLY INTEGRATED WAFERS WITH THERMAL DISSIPATION
20170040295 · 2017-02-09 · ·

Technologies are generally described related to three-dimensional integration of integrated circuits (ICs) with spacing for heat dissipation. According to some examples, a self-aligned silicide may be formed in a temporary silicon layer and removed subsequent to bonding of the wafers to achieve improved contact between the combined ICs and enhanced heat dissipation through added spacing between the ICs.

Semiconductor device and method of fabricating same

A semiconductor device includes, an alloy layer sandwiched between a first Ag layer formed on a mounting board or circuit board and a second Ag layer formed on a semiconductor element, wherein the alloy layer contains an intermetallic compound of Ag.sub.3Sn formed by Ag components of the first Ag layer and the second Ag layer and Sn, and wherein a plurality of wires containing Ag are arranged extended from an outside-facing periphery of the alloy layer.

Semiconductor device and method of fabricating same

A semiconductor device includes, an alloy layer sandwiched between a first Ag layer formed on a mounting board or circuit board and a second Ag layer formed on a semiconductor element, wherein the alloy layer contains an intermetallic compound of Ag.sub.3Sn formed by Ag components of the first Ag layer and the second Ag layer and Sn, and wherein a plurality of wires containing Ag are arranged extended from an outside-facing periphery of the alloy layer.