Stacked microelectronic devices and methods for manufacturing such devices are disclosed herein. In one embodiment, a stacked microelectronic device assembly can include a first known good packaged microelectronic device including a first interposer substrate. A first die and a first through-casing interconnects are electrically coupled to the first interposer substrate. A first casing at least partially encapsulates the first device such that a portion of each first interconnect is accessible at a top portion of the first casing. A second known good packaged microelectronic device is coupled to the first device in a stacked configuration. The second device can include a second interposer substrate having a plurality of second interposer pads and a second die electrically coupled to the second interposer substrate. The exposed portions of the first interconnects are electrically coupled to corresponding second interposer pads.

Stacked microelectronic devices and methods for manufacturing such devices are disclosed herein. In one embodiment, a stacked microelectronic device assembly can include a first known good packaged microelectronic device including a first interposer substrate. A first die and a first through-casing interconnects are electrically coupled to the first interposer substrate. A first casing at least partially encapsulates the first device such that a portion of each first interconnect is accessible at a top portion of the first casing. A second known good packaged microelectronic device is coupled to the first device in a stacked configuration. The second device can include a second interposer substrate having a plurality of second interposer pads and a second die electrically coupled to the second interposer substrate. The exposed portions of the first interconnects are electrically coupled to corresponding second interposer pads.

An oscillator includes a first resonator element, a first package that accommodates the first resonator element, a relay substrate on which the first package is mounted, a heater element that is attached to the first package or the relay substrate, a second package that accommodates the first package, and a heat insulating member that is provided at least between the second package and the relay substrate or between the relay substrate and the first package.

A method of forming a wire loop in connection with a semiconductor package is provided. The method includes the steps of: (1) providing package data related to the semiconductor package to a wire bonding machine; (2) providing at least one looping control value related to a desired wire loop to the wire bonding machine, the at least one looping control value including at least a loop height value related to the desired wire loop; (3) deriving looping parameters, using an algorithm, for forming the desired wire loop; (4) forming a first wire loop on the wire bonding machine using the looping parameters derived in step (3); (5) measuring actual looping control values of the first wire loop formed in step (4) corresponding to the at least one looping control value; and (6) comparing the actual looping control values measured in step (5) to the at least one looping control value provided in step (2).

A method of forming a wire loop in connection with a semiconductor package is provided. The method includes the steps of: (1) providing package data related to the semiconductor package to a wire bonding machine; (2) providing at least one looping control value related to a desired wire loop to the wire bonding machine, the at least one looping control value including at least a loop height value related to the desired wire loop; (3) deriving looping parameters, using an algorithm, for forming the desired wire loop; (4) forming a first wire loop on the wire bonding machine using the looping parameters derived in step (3); (5) measuring actual looping control values of the first wire loop formed in step (4) corresponding to the at least one looping control value; and (6) comparing the actual looping control values measured in step (5) to the at least one looping control value provided in step (2).

There is provided a semiconductor device including an insulating substrate provided with a circuit surface, and an external terminal bonded to the circuit surface. The circuit surface has an upper surface that is in contact with and bonded to a part of a lower surface of the external terminal. In at least a part of a portion where the upper surface of the circuit surface and the lower surface of the external terminal are in contact with each other, a melted portion of the circuit surface and the external terminal is formed. A gap between the upper surface of the circuit surface and the lower surface of the external terminal has a size of 20 μm or less. The circuit surface and the external terminal are each made of copper or copper alloy.

There is provided a semiconductor device including an insulating substrate provided with a circuit surface, and an external terminal bonded to the circuit surface. The circuit surface has an upper surface that is in contact with and bonded to a part of a lower surface of the external terminal. In at least a part of a portion where the upper surface of the circuit surface and the lower surface of the external terminal are in contact with each other, a melted portion of the circuit surface and the external terminal is formed. A gap between the upper surface of the circuit surface and the lower surface of the external terminal has a size of 20 μm or less. The circuit surface and the external terminal are each made of copper or copper alloy.

A semiconductor device includes: a first chip including a first electrode; a wiring member; a second chip located between the first chip and the wiring member, including a second electrode; a first conductive plate located on the first electrode, in a second direction a dimension of the first conductive plate being greater than a dimension of the first chip, the second direction crossing a first direction being from the first chip toward the second chip; a second conductive plate located on the second electrode, in a second direction a dimension of the second conductive plate being greater than a dimension of the second chip; and a first wire being bonded to the wiring member, a portion of the first conductive plate protruding further in the second direction than the first chip, and a portion of the second conductive plate protruding further in the second direction than the second chip.

A semiconductor device includes a substrate, a semiconductor chip, a plurality of bonding pads on a surface of the semiconductor chip, a plurality of probe pads on a surface of the semiconductor chip, a plurality of connection pads on a surface of the substrate, and a plurality of bonding wires that electrically connect the bonding pads and the connection pads. The plurality of bonding pads include a first bonding pad and a second bonding pad, the plurality of probe pads include a first probe pad and a second probe pad, and a part of the first probe pad is disposed between the second bonding pad and the second probe pad.

A method of forming a wire loop in connection with a semiconductor package is provided. The method includes the steps of: (1) providing package data related to the semiconductor package to a wire bonding machine; (2) providing at least one looping control value related to a desired wire loop to the wire bonding machine, the at least one looping control value including at least a loop height value related to the desired wire loop; (3) deriving looping parameters, using an algorithm, for forming the desired wire loop; (4) forming a first wire loop on the wire bonding machine using the looping parameters derived in step (3); (5) measuring actual looping control values of the first wire loop formed in step (4) corresponding to the at least one looping control value; and (6) comparing the actual looping control values measured in step (5) to the at least one looping control value provided in step (2).