H01L2224/81065

METHODS FOR LOW TEMPERATURE BONDING USING NANOPARTICLES
20230132060 · 2023-04-27 ·

A method of making an assembly can include juxtaposing a top surface of a first electrically conductive element at a first surface of a first substrate with a top surface of a second electrically conductive element at a major surface of a second substrate. One of: the top surface of the first conductive element can be recessed below the first surface, or the top surface of the second conductive element can be recessed below the major surface. Electrically conductive nanoparticles can be disposed between the top surfaces of the first and second conductive elements. The conductive nanoparticles can have long dimensions smaller than 100 nanometers. The method can also include elevating a temperature at least at interfaces of the juxtaposed first and second conductive elements to a joining temperature at which the conductive nanoparticles can cause metallurgical joints to form between the juxtaposed first and second conductive elements.

Semiconductor device and method of manufacturing thereof

There is provided semiconductor devices and methods of forming the same, the semiconductor devices including: a first semiconductor element having a first electrode; a second semiconductor element having a second electrode; a Sn-based micro-solder bump formed on the second electrode; and a concave bump pad including the first electrode opposite to the micro-solder bump, where the first electrode is connected to the second electrode via the micro-solder bump and the concave bump pad.

Semiconductor device manufacturing method
11476229 · 2022-10-18 · ·

According to an embodiment, a temperature of an inside of a furnace is set to fall within a range of a reduction temperature or more of a carboxylic acid and less than a melting temperature of a solder bump, and the inside is concurrently set to have a first carboxylic acid gas concentration. Thereafter, the temperature of the inside is raised up to the melting temperature, and the inside is concurrently set to have a second carboxylic acid gas concentration. The second carboxylic acid gas concentration is lower than the first carboxylic acid gas concentration, and is a concentration containing a minimum amount of carboxylic acid gas defined to achieve reduction on an oxide film of the solder bump. The inside has the second carboxylic acid gas concentration at least at a time when the temperature of the inside reaches the melting temperature.

METHOD OF USING PROCESSING OVEN

A method of using a processing oven may include disposing at least one substrate in a chamber of the oven and activating a lamp assembly disposed above them to increase their temperature to a first temperature. A chemical vapor may be admitted into the chamber above the at least one substrate and an inert gas may be admitted into the chamber below the at least one substrate. The temperature of the at least one substrate may then be increased to a second temperature higher than the first temperature and then cooled down.

METHOD OF USING PROCESSING OVEN

A method of using a processing oven may include disposing at least one substrate in a chamber of the oven and activating a lamp assembly disposed above them to increase their temperature to a first temperature. A chemical vapor may be admitted into the chamber above the at least one substrate and an inert gas may be admitted into the chamber below the at least one substrate. The temperature of the at least one substrate may then be increased to a second temperature higher than the first temperature and then cooled down.

Method of using processing oven

A method of using a solder reflow oven can include disposing at least one substrate including solder in a chamber of the oven. The method can include decreasing a pressure of the chamber to a first pressure between about 0.1-50 Torr. After decreasing the pressure of the chamber, the temperature of the at least one substrate can be increased to a first temperature. Formic acid vapor can be admitted into the chamber above the at least one substrate while nitrogen is discharged into the chamber below the at least one substrate. The method can also include removing at least a portion of the formic acid vapor from the enclosure. After the removing step, the temperature of the at least one substrate can be further increased to a second temperature higher than the first temperature. The at least one substrate can be maintained at the second temperature for a first time. And then, the at least one substrate can be cooled.

Method of using processing oven

A method of using a solder reflow oven can include disposing at least one substrate including solder in a chamber of the oven. The method can include decreasing a pressure of the chamber to a first pressure between about 0.1-50 Torr. After decreasing the pressure of the chamber, the temperature of the at least one substrate can be increased to a first temperature. Formic acid vapor can be admitted into the chamber above the at least one substrate while nitrogen is discharged into the chamber below the at least one substrate. The method can also include removing at least a portion of the formic acid vapor from the enclosure. After the removing step, the temperature of the at least one substrate can be further increased to a second temperature higher than the first temperature. The at least one substrate can be maintained at the second temperature for a first time. And then, the at least one substrate can be cooled.

WAFER STACKING FOR INTEGRATED CIRCUIT MANUFACTURING

A method of manufacturing integrated devices, and a stacked integrated device are disclosed. In an embodiment, the method comprises providing a substrate; mounting at least a first electronic component on the substrate; positioning a handle wafer above the first electronic component; attaching the first electronic component to the substrate via electrical connectors between the first electronic component and the substrate; and while attaching the first electronic component to the substrate, using the handle wafer to apply pressure, toward the substrate, to the first electronic component, to manage planarity of the first electronic component during the attaching. In an embodiment, a joining process is used to attach the first electronic component to the substrate via the electrical connectors. For example, thermal compression bonding may be used to attach the first electronic component to the substrate via the electrical connectors.

Novel 3D Integration Method Using SOI Substrates and Structures Produced Thereby

A process and resultant article of manufacture made by such process comprises forming through vias needed to connect a bottom device layer in a bottom silicon wafer to the one in the top device layer in a top silicon wafer comprising a silicon-on-insulator (SOI) wafer. Through vias are disposed in such a way that they extend from the middle of the line (MOL) interconnect of the top wafer to the buried oxide (BOX) layer of the SOI wafer with appropriate insulation provided to isolate them from the SOI device layer.

SOLDER REFLOW OVEN FOR BATCH PROCESSING

A solder reflow oven may include a reflow chamber and a plurality of vertically spaced apart wafer-support plates positioned in the reflow chamber. A plurality of semiconductor wafers each including a solder are configured to be disposed in the reflow chamber such that each semiconductor wafer is disposed proximate to, and vertically spaced apart from, a wafer-support plate. Each wafer-support plate may include at least one of liquid-flow channels or resistive heating elements. A control system control the flow of a hot liquid through the channels or activate the heating elements to heat a wafer to a temperature above the solder reflow temperature.