A fabrication method of an electronic device bonding structure includes the following steps. A first electronic component including a first conductive bonding portion is provided. A second electronic component including a second conductive bonding portion is provided. A first organic polymer layer is formed on the first conductive bonding portion. A second organic polymer layer is formed on the second conductive bonding portion. Bonding is performed on the first electronic component and the second electronic component through the first conductive bonding portion and the second conductive bonding portion, such that the first electronic component and the second electronic component are electrically connected. The first organic polymer layer and the second organic polymer layer diffuse into the first conductive bonding portion and the second conductive bonding portion after the bonding. An electronic device bonding structure is also provided.

In various embodiments, a method for forming a bonded structure is disclosed. The method can comprise mounting a first integrated device die to a carrier. After mounting, the first integrated device die can be thinned. The method can include providing a first layer on an exposed surface of the first integrated device die. At least a portion of the first layer can be removed. A second integrated device die can be directly bonded to the first integrated device die without an intervening adhesive.

In various embodiments, a method for forming a bonded structure is disclosed. The method can comprise mounting a first integrated device die to a carrier. After mounting, the first integrated device die can be thinned. The method can include providing a first layer on an exposed surface of the first integrated device die. At least a portion of the first layer can be removed. A second integrated device die can be directly bonded to the first integrated device die without an intervening adhesive.

A technique for fabricating bumps on a substrate is disclosed. A substrate that includes a set of pads formed on a surface thereof is prepared. A bump base is formed on each pad of the substrate. Each bump base has a tip extending outwardly from the corresponding pad. A resist layer is patterned on the substrate to have a set of holes through the resist layer. Each hole is aligned with the corresponding pad and having space configured to surround the tip of the bump base formed on the corresponding pad. The set of the holes in the resist layer is filled with conductive material to form a set of bumps on the substrate. The resist layer is stripped from the substrate with leaving the set of the bumps.

A technique for fabricating bumps on a substrate is disclosed. A substrate that includes a set of pads formed on a surface thereof is prepared. A bump base is formed on each pad of the substrate. Each bump base has a tip extending outwardly from the corresponding pad. A resist layer is patterned on the substrate to have a set of holes through the resist layer. Each hole is aligned with the corresponding pad and having space configured to surround the tip of the bump base formed on the corresponding pad. The set of the holes in the resist layer is filled with conductive material to form a set of bumps on the substrate. The resist layer is stripped from the substrate with leaving the set of the bumps.

A semiconductor device having a semiconductor module that includes a first conductor layer and a second conductor layer facing each other, a group of semiconductor elements that are formed between the first and second conductor layers, and are connected to the second conductor layer respectively via a group of conductor blocks, and a circuit board having one end portion thereof located in a space between the semiconductor elements and the second conductor layer. Each semiconductor element includes first and second main electrodes respectively formed on first and second main surfaces thereof, and a control electrode that is formed on the second main surface. The first main electrode is electrically connected to the first conductor layer. The second main electrode is electrically connected to the second conductor layer via the respective conductor block. The circuit board includes a first wiring layer electrically connected to the control electrodes of the semiconductor elements.

A semiconductor device having a semiconductor module that includes a first conductor layer and a second conductor layer facing each other, a group of semiconductor elements that are formed between the first and second conductor layers, and are connected to the second conductor layer respectively via a group of conductor blocks, and a circuit board having one end portion thereof located in a space between the semiconductor elements and the second conductor layer. Each semiconductor element includes first and second main electrodes respectively formed on first and second main surfaces thereof, and a control electrode that is formed on the second main surface. The first main electrode is electrically connected to the first conductor layer. The second main electrode is electrically connected to the second conductor layer via the respective conductor block. The circuit board includes a first wiring layer electrically connected to the control electrodes of the semiconductor elements.

The present disclosure relates to a microelectronics package with a vertically stacked structure of a microelectromechanical systems (MEMS) device and a controller device. The MEMS device includes a MEMS component, a MEMS through-via, and a MEMS connecting layer configured to electrically connect the MEMS component with the MEMS through-via. The controller device includes a controlling component, a controller through-via, and a controller connecting layer configured to electrically connect the controlling component with the controller through-via. The controller through-via is in contact with the MEMS through-via, such that the controlling component in the controller device is configured to control the MEMS component in the MEMS device.

The present disclosure relates to a microelectronics package with a vertically stacked structure of a microelectromechanical systems (MEMS) device and a controller device. The MEMS device includes a MEMS component, a MEMS through-via, and a MEMS connecting layer configured to electrically connect the MEMS component with the MEMS through-via. The controller device includes a controlling component, a controller through-via, and a controller connecting layer configured to electrically connect the controlling component with the controller through-via. The controller through-via is in contact with the MEMS through-via, such that the controlling component in the controller device is configured to control the MEMS component in the MEMS device.

A first wiring is disposed above operating regions of plural unit transistors formed on a substrate. A second wiring is disposed above the substrate. An insulating film is disposed on the first and second wirings. First and second cavities are formed in the insulating film. As viewed from above, the first and second cavities entirely overlap with the first and second wirings, respectively. A first bump is disposed on the insulating film and is electrically connected to the first wiring via the first cavity. A second bump is disposed on the insulating film and is electrically connected to the second wiring via the second cavity. As viewed from above, at least one of the plural operating regions is disposed within the first bump and is at least partially disposed outside the first cavity. The planar configuration of the first cavity and that of the second cavity are substantially identical.