H01L2224/8188

Clips defining electrical pathway on a flexible sheet
10079223 · 2018-09-18 · ·

A conductive pathway mounted on an electrically insulating sheet having an upper face and an opposed lower face, said sheet having a plurality of pairs of apertures; a plurality of electrically conductive clips, each clip being separated spatially from an adjacent said clip; each electrically conductive clip comprising a first body portion and first and second depending legs defining a sheet-receiving recess therebetween, said first body portion being disposed in contacting relation with said upper face of said sheet and said legs being disposed in contacting relation with said lower face of said sheet; each leg of one of said electrically conductive clips extending through one of said apertures of a pair of said apertures from said upper face to said lower face; and a plurality of electrical components each mounted in conductive relationship to two adjacent said conductive clips and bridging said insulating sheet.

CLIPS DEFINING ELECTRICAL PATHWAY ON A FLEXIBLE SHEET
20180138156 · 2018-05-17 · ·

A conductive pathway mounted on an electrically insulating sheet having an upper face and an opposed lower face, said sheet having a plurality of pairs of apertures; a plurality of electrically conductive clips, each clip being separated spatially from an adjacent said clip; each electrically conductive clip comprising a first body portion and first and second depending legs defining a sheet-receiving recess therebetween, said first body portion being disposed in contacting relation with said upper face of said sheet and said legs being disposed in contacting relation with said lower face of said sheet; each leg of one of said electrically conductive clips extending through one of said apertures of a pair of said apertures from said upper face to said lower face; and a plurality of electrical components each mounted in conductive relationship to two adjacent said conductive clips and bridging said insulating sheet.

2.5D microelectronic assembly and method with circuit structure formed on carrier
09917042 · 2018-03-13 · ·

A dielectric element has a plurality of contacts at a first surface and a plurality of first traces coupled thereto which extend in directions parallel to the first surface. A circuit structure made of a plurality of dielectric layers and electrically conductive features thereon includes a plurality of bumps at a first surface which face the contacts of the dielectric element and are joined thereto. Circuit structure contacts at a second surface opposite the first surface are electrically coupled with the bumps through second traces on the circuit structure, the circuit structure contacts configured for connection with a plurality of element contacts of each of a plurality of microelectronic elements, wherein the microelectronic elements can be assembled therewith such that element contacts thereof face and are joined with the circuit structure contacts.

2.5D microelectronic assembly and method with circuit structure formed on carrier
09917042 · 2018-03-13 · ·

A dielectric element has a plurality of contacts at a first surface and a plurality of first traces coupled thereto which extend in directions parallel to the first surface. A circuit structure made of a plurality of dielectric layers and electrically conductive features thereon includes a plurality of bumps at a first surface which face the contacts of the dielectric element and are joined thereto. Circuit structure contacts at a second surface opposite the first surface are electrically coupled with the bumps through second traces on the circuit structure, the circuit structure contacts configured for connection with a plurality of element contacts of each of a plurality of microelectronic elements, wherein the microelectronic elements can be assembled therewith such that element contacts thereof face and are joined with the circuit structure contacts.

SSI PoP
20180068930 · 2018-03-08 · ·

An assembly can include a first microelectronic package and a circuit structure comprising a plurality of dielectric layers and electrically conductive features thereon. The first package can include a substrate having a plurality of first contacts at a first or second surface thereof and a plurality of second contacts at the first surface thereof, and a first microelectronic element having a plurality of element contacts at a front surface thereof. The first contacts can be electrically coupled with the element contacts of the first microelectronic element. The electrically conductive features of the first circuit structure can include a plurality of bumps at the first surface of the circuit structure facing the second contacts of the substrate and joined thereto, a plurality of circuit structure contacts at a second surface of the circuit structure, and a plurality of traces coupling at least some of the bumps with the circuit structure contacts.

SSI PoP
20180068930 · 2018-03-08 · ·

An assembly can include a first microelectronic package and a circuit structure comprising a plurality of dielectric layers and electrically conductive features thereon. The first package can include a substrate having a plurality of first contacts at a first or second surface thereof and a plurality of second contacts at the first surface thereof, and a first microelectronic element having a plurality of element contacts at a front surface thereof. The first contacts can be electrically coupled with the element contacts of the first microelectronic element. The electrically conductive features of the first circuit structure can include a plurality of bumps at the first surface of the circuit structure facing the second contacts of the substrate and joined thereto, a plurality of circuit structure contacts at a second surface of the circuit structure, and a plurality of traces coupling at least some of the bumps with the circuit structure contacts.

Method of manufacturing a semiconductor device
09865463 · 2018-01-09 · ·

In a method of manufacturing a semiconductor device, a first photoresist layer is applied on a polycrystalline silicon layer formed on a semiconductor substrate. The first photoresist layer is then patterned and cured with UV rays. The polycrystalline silicon layer is etched, using the first photoresist layer as a mask, to form a gate electrode and a resistive film of the polycrystalline silicon layer. A second photoresist layer is applied on the cured first photoresist layer and patterned to form an opening portion exposing the first photoresist layer. Impurities are ion implanted through the opening portion in the polycrystalline silicon layer. The channeling of impurities implanted during the ion implantation is suppressed by the cured first photoresist layer.

SSI PoP
09773723 · 2017-09-26 · ·

An assembly can include a first microelectronic package and a circuit structure comprising a plurality of dielectric layers and electrically conductive features thereon. The first package can include a substrate having a plurality of first contacts at a first or second surface thereof and a plurality of second contacts at the first surface thereof, and a first microelectronic element having a plurality of element contacts at a front surface thereof. The first contacts can be electrically coupled with the element contacts of the first microelectronic element. The electrically conductive features of the first circuit structure can include a plurality of bumps at the first surface of the circuit structure facing the second contacts of the substrate and joined thereto, a plurality of circuit structure contacts at a second surface of the circuit structure, and a plurality of traces coupling at least some of the bumps with the circuit structure contacts.

SSI PoP
09773723 · 2017-09-26 · ·

An assembly can include a first microelectronic package and a circuit structure comprising a plurality of dielectric layers and electrically conductive features thereon. The first package can include a substrate having a plurality of first contacts at a first or second surface thereof and a plurality of second contacts at the first surface thereof, and a first microelectronic element having a plurality of element contacts at a front surface thereof. The first contacts can be electrically coupled with the element contacts of the first microelectronic element. The electrically conductive features of the first circuit structure can include a plurality of bumps at the first surface of the circuit structure facing the second contacts of the substrate and joined thereto, a plurality of circuit structure contacts at a second surface of the circuit structure, and a plurality of traces coupling at least some of the bumps with the circuit structure contacts.

Reversed build-up substrate for 2.5D

A method of making an assembly can include forming a circuit structure defining front and rear surfaces, and forming a substrate onto the rear surface. The forming of the circuit structure can include forming a first dielectric layer coupled to the carrier. The first dielectric layer can include front contacts configured for joining with contacts of one or more microelectronic elements, and first traces. The forming of the circuit structure can include forming rear conductive elements at the rear surface coupled with the front contacts through the first traces. The forming of the substrate can include forming a dielectric element directly on the rear surface. The dielectric element can have first conductive elements facing the rear conductive elements and joined thereto. The dielectric element can include second traces coupled with the first conductive elements. The forming of the substrate can include forming terminals at a surface of the substrate.