According to one embodiment, a manufacturing method of a semiconductor device is provided. The manufacturing method includes removing a portion of an edge region from a front surface of a first substrate to form a notch in the edge region; bonding the front surface of the first substrate and a front surface of a second substrate together to forma stacked substrate, wherein the stack substrate includes an opening at a position corresponding to the notch; and filling the opening with an embedding member.

The present invention discloses a method for preparing a semiconductor sample for failure analysis, which is characterized by using an adhesive layer comprising a non-volatile and non-liquid adhesive material with higher adhesion to the dielectric materials and lower adhesion to the metallic contact materials to selectively remove part of the dielectric materials in a large area with high uniformity, but completely remain the metallic contact materials, and not chemically react with the semiconductor specimens or even damage to the structures of interest to be analyzed, and different adhesive materials can be selected as the adhesive layer to control the adhesion to the dielectric layer, thereby the removed thickness of the dielectric layer can be controlled to provide a semiconductor specimen for failure analysis.

According to one embodiment, a manufacturing method of a semiconductor device is provided. The manufacturing method includes removing a portion of an edge region from a front surface of a first substrate to form a notch in the edge region; bonding the front surface of the first substrate and a front surface of a second substrate together to forma stacked substrate, wherein the stack substrate includes an opening at a position corresponding to the notch; and filling the opening with an embedding member.

A light-emitting device includes a first light-emitting element, a second light-emitting element having a peak emission wavelength different from that of the first light-emitting element, a light-guide member covering a light extracting surface and lateral surfaces of the first light-emitting element and a light extracting surface and lateral surfaces of the second light-emitting element, and a wavelength conversion layer continuously covering the light extracting surface of each of the first and second light-emitting elements and disposed apart from each of the first and second light-emitting elements, and a first reflective member covering outer lateral surfaces of the light-guide member. An angle defined by an active layer of the first light-emitting element and an active layer of the second light-emitting element is less than 180° at a wavelength conversion layer side.

A metal sintered bonding body bonds a substrate and a die. In the metal sintered bonding body, at least a center part and corner part of a rectangular region where the metal sintered bonding body faces the die have a low-porosity region whose porosity is lower than an average porosity of the rectangular region. The low-porosity region is located within a strip-shaped region whose central lines are diagonal lines of the rectangular region.

A chip mounting portion included in a semiconductor device has a region including a semiconductor chip in plan view. When an average surface roughness of the region is Ra, 0.8 mRa3.0 m holds.

A method of manufacturing a semiconductor device includes: forming a first electrode and a second electrode on an insulating layer so as to be apart from each other; forming a barrier made of same material as a metal terminal on a peripheral portion of an ultrasonic bonding portion of the metal terminal; and applying pressing force and ultrasonic vibration to the ultrasonic bonding portion of the metal terminal by using an ultrasonic tool to ultrasonically bond the metal terminal to the first electrode.

A multi-layer wafer and method of manufacturing such wafer are provided. The method comprises applying a stress compensating oxide layer to each of two heterogeneous wafers, applying at least one bonding oxide layer to at least one of the two heterogeneous wafers, chemical-mechanical polishing the at least one bonding oxide layer, and low temperature bonding the two heterogeneous wafers to form a multi-layer wafer pair. The multi-layer wafer comprises two heterogeneous wafers, each of the heterogeneous wafers having a stress compensating oxide layer and at least one bonding oxide layer applied to at least one of the two heterogeneous wafers. The two heterogeneous wafers are low temperature bonded together to form the multi-layer wafer.

A bond chuck having individually-controllable regions, and associated systems and methods are disclosed herein. The bond chuck comprises a plurality of individual regions that are movable relative to one another in a longitudinal direction. In some embodiments, the individual regions include a first region having a first outer surface, and a second region peripheral to the first region and including a second outer surface. The first region is movable in a longitudinal direction to a first position, and the second region is movable in the longitudinal direction to a second position, such that in the second position, the second outer surface of the second region extends longitudinally beyond the first outer surface of the first region. The bond chuck can be positioned proximate a substrate of a semiconductor device such that movement of the first region and/or second region affect a shape of the substrate, which thereby causes an adhesive on the substrate to flow in a lateral, predetermined direction.

A bond chuck having individually-controllable regions, and associated systems and methods are disclosed herein. The bond chuck comprises a plurality of individual regions configured to be individually heated independent of one another. In some embodiments, the individual regions include a first region configured to be heated to a first temperature, and a second region peripheral to the first region and configured to be heated to a second temperature different than the first temperature. In some embodiments, the bond chuck further comprises (a) a first coil disposed within the first region and configured to heat the first region to the first temperature, and (b) a second coil disposed within the second region and configured to heat the second region to the second temperature. The bond chuck can be positioned proximate a substrate of a semiconductor device such that heating the first region and/or second region affect the viscosity of an adhesive used to bond substrates of the semiconductor device to one another. Accordingly, heating the first region and/or the second region can cause the adhesive on the substrate to flow in a lateral, predetermined direction.