Patent classifications
H01L2224/8313
BONDING APPARATUS AND BONDING METHOD
A bonding apparatus includes a first holder, a second holder, a first interferometer, a housing, a gas supply and an airflow control cover. The first holder attracts and holds the first substrate. The second holder attracts and holds the second substrate. The first interferometer measures, by radiating light to the second holder or a first object which is moved along with the second holder in the first horizontal direction, a distance to the second holder or the first object in the first horizontal direction. The housing accommodates therein the first holder, the second holder and the first interferometer. The gas supply is provided at a lateral side of the housing, and supplies a gas into the housing. The airflow control cover is provided within the housing, and redirects a part of a flow of the gas supplied from the gas supply toward a first path of the light.
Integrated circuit package and method
In an embodiment, a device includes: a bottom integrated circuit die having a first front side and a first back side; a top integrated circuit die having a second front side and a second back side, the second back side being bonded to the first front side, the top integrated circuit die being free from through substrate vias (TSVs); a dielectric layer surrounding the top integrated circuit die, the dielectric layer being disposed on the first front side, the dielectric layer and the bottom integrated circuit die being laterally coterminous; and a through via extending through the dielectric layer, the through via being electrically coupled to the bottom integrated circuit die, surfaces of the through via, the dielectric layer, and the top integrated circuit die being planar.
Display device and method for manufacturing display device
According to one embodiment, a display device includes a display panel including a first substrate, and a wiring board mounted on a mounting portion of the first substrate. The display panel includes a first terminal and a second terminal located in the mounting portion, a first alignment mark located in the mounting portion and located between the first terminal and the second terminal, a first wiring line connected to the first terminal, and a second wiring line connected to the second terminal. The wiring board includes a first connection wiring line connected to the first terminal, a second connection wiring line connected to the second terminal, and a second alignment mark located between the first connection wiring line and the second connection wiring line.
FIDUCIAL FOR AN ELECTRONIC DEVICE
A substrate for an electronic device may include one or more layers. The substrate may include a cavity defined in the substrate. The cavity may be adapted to receive a semiconductor die. The substrate may include a fiducial mark positioned proximate the cavity. The fiducial mark may be exposed on a first surface of the substrate. The fiducial mark may include a first region including a dielectric filler material. The fiducial mark may include a second region including a conductive filler material. In an example, the second region surrounds the first region. In another example, the dielectric filler material has a lower reflectivity in comparison to the conductive filler material to provide a contrast between the first region and the second region.
Adhesive bonding composition and electronic components prepared from the same
A curable resin or adhesive composition includes at least one monomer, a photoinitiator capable of initiating polymerization of the monomer when exposed to light, and at least one energy converting material, preferably a phosphor, capable of producing light when exposed to radiation (typically X-rays). The material is particularly suitable for bonding components at ambient temperature in situations where the bond joint is not accessible to an external light source. An associated method includes: placing a polymerizable adhesive composition, including a photoinitiator and energy converting material, such as a down-converting phosphor, in contact with at least two components to be bonded to form an assembly; and, irradiating the assembly with radiation at a first wavelength, capable of conversion (down-conversion by the phosphor) to a second wavelength capable of activating the photoinitiator, to prepare items such as inkjet cartridges, wafer-to-wafer assemblies, semiconductors, integrated circuits, and the like.
METHOD AND DEVICE FOR TRANSFERRING COMPONENTS
A method for the transfer of components from a sender substrate to a receiver substrate includes provision and/or production of the components on the sender substrate, transfer of the components of the sender substrate to the transfer substrate, and transfer of the components from the transfer substrate to the receiver substrate.The components can be transferred selectively by means of bonding means and/or debonding means.
Integrated Circuit Packages
In an embodiment, a device includes: a bottom integrated circuit die having a first front side and a first back side; a top integrated circuit die having a second front side and a second back side, the second back side being bonded to the first front side, the top integrated circuit die being free from through substrate vias (TSVs); a dielectric layer surrounding the top integrated circuit die, the dielectric layer being disposed on the first front side, the dielectric layer and the bottom integrated circuit die being laterally coterminous; and a through via extending through the dielectric layer, the through via being electrically coupled to the bottom integrated circuit die, surfaces of the through via, the dielectric layer, and the top integrated circuit die being planar.
SYSTEM AND APPARATUS FOR SEQUENTIAL TRANSIENT LIQUID PHASE BONDING
Embodiments of the present disclosure include method for sequentially mounting multiple semiconductor devices onto a substrate having a composite metal structure on both the semiconductor devices and the substrate for improved process tolerance and reduced device distances without thermal interference. The mounting process causes “selective” intermixing between the metal layers on the devices and the substrate and increases the melting point of the resulting alloy materials.
Method and apparatus for bonding semiconductor substrate
A method and an apparatus for bonding semiconductor substrates are provided. The method includes at least the following steps. A first position of a first semiconductor substrate on a first support is gauged by a gauging component embedded in the first support and a first sensor facing towards the gauging component. A second semiconductor substrate is transferred to a position above the first semiconductor substrate by a second support. A second position of the second semiconductor substrate is gauged by a second sensor mounted on the second support and located above the first support. The first semiconductor substrate is positioned based on the second position of the second semiconductor substrate. The second semiconductor substrate is bonded to the first semiconductor substrate.
Semiconductor device with through semiconductor via and method for fabricating the same
The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a first semiconductor structure, a second semiconductor structure, a through semiconductor via, and an insulation layer. The first semiconductor structure includes a first circuit layer and a first main bonding layer in the first circuit layer and substantially coplanar with a front face of the first circuit layer. The second semiconductor structure includes a second circuit layer on the first circuit layer and a second main bonding layer in the second circuit layer, and topologically aligned with and contacted to the first main bonding layer. The through semiconductor via is along the second semiconductor structure and the first and second main bonding layer, and extending to the first circuit layer. The insulation layer is positioned on a sidewall of the through semiconductor via.