A structure including stacked substrates, a first semiconductor die, a second semiconductor die, and an insulating encapsulation is provided. The first semiconductor die is disposed over the stacked substrates. The second semiconductor die is stacked over the first semiconductor die. The insulating encapsulation includes a first encapsulation portion encapsulating the first semiconductor die and a second encapsulation portion encapsulating the second semiconductor die.

In some embodiments, the present disclosure relates to an integrated chip that includes bonding structure arranged directly between a first substrate and a second substrate. The first substrate includes a first transparent material and a first alignment mark. The first alignment mark is arranged on an outer region of the first substrate and also includes the first transparent material. The first alignment mark is defined by surfaces of the first substrate that are arranged between an uppermost surface of the first substrate and a lowermost surface of the first substrate. The second substrate includes a second alignment mark on an outer region of the second substrate. The second alignment mark directly underlies the first alignment mark, and the bonding structure is arranged directly between the first alignment mark and the second alignment mark.

A manufacturing method for a semiconductor apparatus sequentially includes bonding a first chip and a second chip together using an adhesive. The first chip includes a first electrode and has a protrusion, and the second chip has a recess. In the bonding, the first chip and the second chip are bonded together in such a manner that the protrusion is positioned into the recess. Further, the method includes forming a through hole in the second chip to expose the first electrode, the first surface being opposite to a second surface having the recess, and forming the second electrode which is electrically connected to the first electrode, in the through hole.

A semiconductor device includes: a substrate; a semiconductor chip disposed adjacent to a front surface of the semiconductor substrate; an adhesive fixing a back surface of the semiconductor chip to the front surface of the substrate; and a plurality of spacers disposed to regulate a distance between the substrate and the semiconductor chip. The spacers are bonded to the front surface of the substrate or the back surface of the semiconductor chip, and are located on respective vertexes of a polygon surrounding a center of gravity of the semiconductor chip.

Interposer-less multi-chip module are provided. In one aspect, an interposer-less multi-chip module includes: a substrate; a base film disposed on the substrate; and chips pressed into the base film, wherein top surfaces of the chips are coplanar. For instance, the chips can have varying thicknesses and are pressed into the base film to different depths such that top surfaces of the chips are coplanar. An interconnect layer having back-end-of line (BEOL) metal wiring can be present on the wafer over the chips. Methods of forming an interposer-less multi-chip module are also provided.

a mounting device and a mounting method is provided with which, after lowering a mounting head holding a chip component in a direction perpendicular to a substrate to bring the chip component into close contact with the substrate subsequent to positioning the chip component and the substrate, a control unit causes a recognition mechanism to start a parallel recognition operation of a chip recognition mark and a substrate recognition mark and recognize the chip recognition mark and the substrate recognition mark through the mounting head in a mounted state in which the chip component is in close contact with the substrate, and calculates mounting position accuracy of the chip component and the substrate.

A mounting device comprises a recognition mechanism and a control unit. The recognition mechanism recognizes a chip recognition mark and a substrate recognition mark through a mounting head and from above the mounting head and is movable in an in-plane direction of a substrate surface of a substrate. The control unit is connected to the recognition mechanism, calculates an amount of misalignment between a chip component and the substrate from position information about the chip recognition mark and the substrate recognition mark obtained from the recognition mechanism, and performs positioning by driving the mounting head and/or the substrate stage according to the amount of misalignment. The recognition mechanism has a chip recognition sensor for recognizing the chip recognition mark and a substrate recognition sensor for recognizing the substrate recognition mark provided independently so that focal positions thereof are different via a common optical axis path.

Embodiments of the present disclosure include method for sequentially mounting multiple semiconductor devices onto a substrate having a composite metal structure on both the semiconductor devices and the substrate for improved process tolerance and reduced device distances without thermal interference. The mounting process causes “selective” intermixing between the metal layers on the devices and the substrate and increases the melting point of the resulting alloy materials.

Provided is a semiconductor architecture including a carrier substrate, alignment marks provided in the carrier substrate, the alignment marks being provided from a first surface of the carrier substrate to a second surface of the carrier substrate, a first semiconductor device provided on the first surface of the carrier substrate based on the alignment marks, a second semiconductor device provided on the second surface of the carrier substrate based on the alignment marks and aligned with the first semiconductor device.

A die bond head apparatus has a die bond head body coupled to a die bond head motion table, a die holder motion table mounted on the die bond head body and a die holder which is operative in use to secure a semiconductor die to a substrate. The die holder is positionable by the die holder motion table independently of the die bond head motion table.