A semiconductor device assembly includes a die stack, a plurality of thermoset regions, and underfill material. The die stack includes at least first and second dies that each have a plurality of conductive interconnect elements on upper surfaces. A portion of the interconnect elements are connected to through-silicon vias that extend between the upper surfaces and lower surfaces of the associated dies. The plurality of thermoset regions each comprise a thin layer of thermoset material extending from the lower surface of the second die to the upper surface of the first die, and are laterally-spaced and discrete from each other. Each of the thermoset regions extends to fill an area between a plurality of adjacent interconnect elements of the first die. The underfill material fills remaining open areas between the interconnect elements of the first die.

A method of fabricating a semiconductor chip includes the following steps. A bonding material layer is formed on a first wafer substrate and is patterned to form a first bonding layer having a strength adjustment pattern. A semiconductor component layer and a first interconnect structure layer are formed on a second wafer substrate. The first interconnect structure layer is located. A second bonding layer is formed on the first interconnect structure layer. The second wafer substrate is bonded to the first wafer substrate by contacting the second bonding layer with the first bonding layer. A bonding interface of the second bonding layer and the first bonding layer is smaller than an area of the second bonding layer. A second interconnect structure layer is formed on the semiconductor component layer. A conductor terminal is formed on the second interconnect structure layer.

A method of fabricating a display device may include disposing a display panel on a stage to be parallel to an XZ-plane defined by a horizontal X-axis and a vertical Z-axis, measuring a height of a first side surface of the display panel in a direction of the Z-axis, rotating the stage such that the first side surface is parallel to a reference horizontal line in case that a result of the measured height indicates that the first side surface includes an inclined surface, moving the display panel in a direction of the Z-axis such that a first pad disposed on the first side surface overlaps the reference horizontal line, and bonding a second pad of a printed circuit board with the first pad.

A structure including stacked substrates, a first semiconductor die, a second semiconductor die, and an insulating encapsulation is provided. The first semiconductor die is disposed over the stacked substrates. The second semiconductor die is stacked over the first semiconductor die. The insulating encapsulation includes a first encapsulation portion encapsulating the first semiconductor die and a second encapsulation portion encapsulating the second semiconductor die.

A method of fabricating a semiconductor chip includes the following steps. A bonding material layer is formed on a first wafer substrate and is patterned to form a first bonding layer having a strength adjustment pattern. A semiconductor component layer and a first interconnect structure layer are formed on a second wafer substrate. The first interconnect structure layer is located. A second bonding layer is formed on the first interconnect structure layer. The second wafer substrate is bonded to the first wafer substrate by contacting the second bonding layer with the first bonding layer. A bonding interface of the second bonding layer and the first bonding layer is smaller than an area of the second bonding layer. A second interconnect structure layer is formed on the semiconductor component layer. A conductor terminal is formed on the second interconnect structure layer.

A bonding apparatus bonds a first substrate having a first alignment mark and a second substrate having a second alignment mark. A first radiation unit radiates white light to an imaging area of a first imaging unit when the second alignment mark is imaged by the first imaging unit. A second radiation unit radiates white light to an imaging area of a second imaging unit when the first alignment mark is imaged by the second imaging unit. A controller detects positions of the first alignment mark and the second alignment mark by processing images obtained by the first imaging unit and the second imaging unit, corrects the detected position of the first alignment mark based on a relationship between a wavelength and an intensity of reflection light reflected from the first substrate, and controls a moving unit based on the corrected position of the first alignment mark.

A bonding apparatus includes a first holder configured to hold a first substrate divided into multiple chips with a tape and a ring frame therebetween, the first substrate being attached to the tape, and an edge of the tape being attached to the ring frame; a second holder configured to hold a second substrate, which is disposed on an opposite side to the tape with respect to the first substrate therebetween, while maintaining a distance from the first substrate; and a pressing device configured to press the multiple chips one by one with the tape therebetween to press and bond the corresponding chip to the second substrate.

Interposer-less multi-chip module are provided. In one aspect, an interposer-less multi-chip module includes: a substrate; a base film disposed on the substrate; and chips pressed into the base film, wherein top surfaces of the chips are coplanar. For instance, the chips can have varying thicknesses and are pressed into the base film to different depths such that top surfaces of the chips are coplanar. An interconnect layer having back-end-of line (BEOL) metal wiring can be present on the wafer over the chips. Methods of forming an interposer-less multi-chip module are also provided.

A structure including stacked substrates, a first semiconductor die, a second semiconductor die, and an insulating encapsulation is provided. The first semiconductor die is disposed over the stacked substrates. The second semiconductor die is stacked over the first semiconductor die. The insulating encapsulation includes a first encapsulation portion encapsulating the first semiconductor die and a second encapsulation portion encapsulating the second semiconductor die.

In an embodiment, a method includes: connecting a light emitting diode to a substrate; encapsulating the light emitting diode with a photosensitive encapsulant; forming a first opening through the photosensitive encapsulant adjacent the light emitting diode; and forming a conductive via in the first opening.