A semiconductor package includes a redistribution substrate and a semiconductor chip on a top surface of the redistribution substrate. The redistribution substrate includes an insulating layer, and first, second, and third redistribution patterns disposed in the insulating layer. The first to third redistribution patterns are sequentially stacked in an upward direction and are electrically connected to each other. Each of the first to third redistribution patterns includes a wire portion that extends parallel to the top surface of the redistribution substrate. Each of the first and third redistribution patterns further includes a via portion that extends from the wire portion in a direction perpendicular to the top surface of the redistribution substrate. The second redistribution pattern furthers include first fine wire patterns that are less wide than the wire portion of the second redistribution pattern.

A semiconductor package includes; a wiring structure including signal wiring and heat transfer wiring, an active chip on the wiring structure, a signal terminal disposed between the wiring structure and the active chip, a first heat transferring terminal disposed between the wiring structure and the active chip and connected to the heat transfer wiring, a passive chip on the wiring structure, a second heat transferring terminal disposed between the wiring structure and the passive chip and connected to the heat transfer wiring, and a heat spreader on the passive chip.

A semiconductor package includes; a wiring structure including signal wiring and heat transfer wiring, an active chip on the wiring structure, a signal terminal disposed between the wiring structure and the active chip, a first heat transferring terminal disposed between the wiring structure and the active chip and connected to the heat transfer wiring, a passive chip on the wiring structure, a second heat transferring terminal disposed between the wiring structure and the passive chip and connected to the heat transfer wiring, and a heat spreader on the passive chip.

A packaged semiconductor device includes a wiring substrate with a bonding pad on a first surface, a wiring layer, a first conductive plug extending through the wiring substrate from the wiring layer to the first surface, a second conductive plug extending through the wiring substrate from the wiring layer to a second surface, and a third conductive plug extending through the wiring substrate from the wiring layer to the second surface. A semiconductor chip is mounted on the first surface and has a pad terminal electrically connected to the bonding pad. A first solder ball is on the second surface of the wiring substrate and electrically connected to the second conductive plug. A second solder ball is on the second surface of the wiring substrate and electrically connected to the third conductive plug.

A packaged semiconductor device includes a wiring substrate with a bonding pad on a first surface, a wiring layer, a first conductive plug extending through the wiring substrate from the wiring layer to the first surface, a second conductive plug extending through the wiring substrate from the wiring layer to a second surface, and a third conductive plug extending through the wiring substrate from the wiring layer to the second surface. A semiconductor chip is mounted on the first surface and has a pad terminal electrically connected to the bonding pad. A first solder ball is on the second surface of the wiring substrate and electrically connected to the second conductive plug. A second solder ball is on the second surface of the wiring substrate and electrically connected to the third conductive plug.

The present disclosure provides an antenna packaging structure radiating electromagnetic waves in a horizontal direction parallel to the device plane and a method making the same. The method includes: providing a support substrate, and forming a separation layer; forming a rewiring layer on the separation layer; forming an antenna array layer on the rewiring layer, the antenna array layer is electrically connected to the metal wire layer; the antenna array layer includes a plurality of antennas which radiates e-m waves in a horizontal direction; each antennas comprises first metal sheets extending along a first direction and second metal sheets extending along a second direction, the first metal sheets are arranged with sheets in parallel and spaced by an sheet-to-sheet interval, second metal sheets are arranged with sheets in parallel and spaced by an sheet-to-sheet interval; forming a molding material layer, which molds the antenna array layer.

The present disclosure provides an antenna packaging structure radiating electromagnetic waves in a horizontal direction parallel to the device plane and a method making the same. The method includes: providing a support substrate, and forming a separation layer; forming a rewiring layer on the separation layer; forming an antenna array layer on the rewiring layer, the antenna array layer is electrically connected to the metal wire layer; the antenna array layer includes a plurality of antennas which radiates e-m waves in a horizontal direction; each antennas comprises first metal sheets extending along a first direction and second metal sheets extending along a second direction, the first metal sheets are arranged with sheets in parallel and spaced by an sheet-to-sheet interval, second metal sheets are arranged with sheets in parallel and spaced by an sheet-to-sheet interval; forming a molding material layer, which molds the antenna array layer.

A package structure and a formation method of a package structure are provided. The method includes disposing a chip structure over a substrate and forming a first adhesive element directly on the chip structure. The first adhesive element has a first thermal conductivity. The method also includes forming a second adhesive element directly on the chip structure. The second adhesive element has a second thermal conductivity, and the second thermal conductivity is greater than the first thermal conductivity. The method further includes attaching a protective lid to the chip structure through the first adhesive element and the second adhesive element.

A package structure and a formation method of a package structure are provided. The method includes disposing a chip structure over a substrate and forming a first adhesive element directly on the chip structure. The first adhesive element has a first thermal conductivity. The method also includes forming a second adhesive element directly on the chip structure. The second adhesive element has a second thermal conductivity, and the second thermal conductivity is greater than the first thermal conductivity. The method further includes attaching a protective lid to the chip structure through the first adhesive element and the second adhesive element.

A method for forming a chip package structure is provided. The method includes disposing a chip package over a wiring substrate. The method includes forming a first heat conductive structure and a second heat conductive structure over the chip package. The first heat conductive structure and the second heat conductive structure are separated by a first gap. The method includes bonding a heat dissipation lid to the chip package through the first heat conductive structure and the second heat conductive structure. The first heat conductive structure and the second heat conductive structure extend toward each other until the first heat conductive structure contacts the second heat conductive structure during bonding the heat dissipation lid to the chip package.