H01L2224/83493

Radio frequency packages containing substrates with coefficient of thermal expansion matched mount pads and associated fabrication methods

Radio frequency (RF) packages containing substrates having coefficient of thermal expansion (CTE) matched mount pads are disclosed, as are methods for fabricating RF packages and substrates. In embodiments, the RF package contains a high thermal performance substrate including a metallic base structure, which has a frontside facing a first RF power die and a first die attach region on the frontside of the base structure. A first CTE matched mount pad is bonded to the metallic base structure and covers the first die attach region. The first CTE mount pad has a CTE greater than the CTE of RF power die and less than the CTE of the metallic base structure. An electrically-conductive bonding material attaches the RF power die to the first CTE matched mount pad, while RF circuitry integrated into first RF power die is electrically coupled to the metallic base structure through the mount pad.

Bonding method of fixing an object to a rough surface

A bonding method is provided. A sheet structure is placed on a substrate surface, and a surface roughness of a surface of the sheet structure is less than or equal to 1.0 micrometer. A carbon nanotube structure is laid on the surface of the sheet structure. Two ends of the carbon nanotube structure are in direct contact with the substrate surface. An organic solvent is added to the two ends of the carbon nanotube structure. An object is laid on the carbon nanotube structure, and a surface of the object being in direct contact with the carbon nanotube structure has a surface roughness less than or equal to 1.0 micrometer.

ILLUMINATION DEVICE
20190257503 · 2019-08-22 ·

An illumination device includes a supporting base, and a light-emitting element inserted in the supporting base. The light-emitting element includes a substrate having a supporting surface and a side surface, a light-emitting chip disposed on the supporting surface, and a first wavelength conversion layer covering the light-emitting chip and only a portion of the supporting surface without covering the side surface.

BONDING METHOD OF FIXING AN OBJECT TO A ROUGH SURFACE
20190206830 · 2019-07-04 ·

A bonding method is provided. A sheet structure is placed on a substrate surface, and a surface roughness of a surface of the sheet structure is less than or equal to 1.0 micrometer. A carbon nanotube structure is laid on the surface of the sheet structure. Two ends of the carbon nanotube structure are in direct contact with the substrate surface. An organic solvent is added to the two ends of the carbon nanotube structure. An object is laid on the carbon nanotube structure, and a surface of the object being in direct contact with the carbon nanotube structure has a surface roughness less than or equal to 1.0 micrometer.

JOINTING MATERIAL, FABRICATION METHOD FOR SEMICONDUCTOR DEVICE USING THE JOINTING MATERIAL, AND SEMICONDUCTOR DEVICE
20190165234 · 2019-05-30 ·

A jointing material includes: at least one type of element at 0.1 wt % to 30 wt %, the element being capable of forming a compound with each of tin and carbon; and tin at 70 wt % to 99.9 wt % as a main component.

JOINTING MATERIAL, FABRICATION METHOD FOR SEMICONDUCTOR DEVICE USING THE JOINTING MATERIAL, AND SEMICONDUCTOR DEVICE
20190165234 · 2019-05-30 ·

A jointing material includes: at least one type of element at 0.1 wt % to 30 wt %, the element being capable of forming a compound with each of tin and carbon; and tin at 70 wt % to 99.9 wt % as a main component.

Semiconductor Packaging Structure and Process

A method and structure for packaging a semiconductor device are provided. In an embodiment a first substrate is bonded to a second substrate, which is bonded to a third substrate. A thermal interface material is placed on the second substrate prior to application of an underfill material. A ring can be placed on the thermal interface material, and an underfill material is dispensed between the second substrate and the third substrate. By placing the thermal interface material and ring prior to the underfill material, the underfill material cannot interfere with the interface between the thermal interface material and the second substrate, and the thermal interface material and ring can act as a physical barrier to the underfill material, thereby preventing overflow.

Semiconductor Packaging Structure and Process

A method and structure for packaging a semiconductor device are provided. In an embodiment a first substrate is bonded to a second substrate, which is bonded to a third substrate. A thermal interface material is placed on the second substrate prior to application of an underfill material. A ring can be placed on the thermal interface material, and an underfill material is dispensed between the second substrate and the third substrate. By placing the thermal interface material and ring prior to the underfill material, the underfill material cannot interfere with the interface between the thermal interface material and the second substrate, and the thermal interface material and ring can act as a physical barrier to the underfill material, thereby preventing overflow.

Illumination device

An illumination device includes a supporting base, and a light-emitting element inserted in the supporting base. The light-emitting element includes a substrate having a supporting surface and a side surface, a light-emitting chip disposed on the supporting surface, and a first wavelength conversion layer covering the light-emitting chip and only a portion of the supporting surface without covering the side surface.

Package having bonding layers

A package includes a carrier substrate, a first die, and a second die. The first die includes a first bonding layer, a second bonding layer opposite to the first bonding layer, and an alignment mark embedded in the first bonding layer. The first bonding layer is fusion bonded to the carrier substrate. The second die includes a third bonding layer. The third bonding layer is hybrid bonded to the second bonding layer of the first die.