H01L2224/83805

LEAD FRAME PACKAGE HAVING CONDUCTIVE SURFACES
20210210418 · 2021-07-08 · ·

Disclosed is a device including a first finger of a plurality of lead fingers of a lead frame connected to a first flag. A second finger of the plurality of lead fingers of the lead frame is connected to a second flag. A semiconductor die is coupled to the lead frame. An encapsulant covers the semiconductor die, the lead frame, and a first end of the plurality of lead fingers, and excludes the first flag and the second flag. The first flag and the second flag are separated and electrically isolated from one another by the encapsulant.

METHOD OF TRANSFERRING MICRO DEVICE
20210013172 · 2021-01-14 ·

A method of transferring a micro device is provided. The method includes: aligning a transfer plate with the micro device thereon with a receiving substrate having a contact pad thereon such that the micro device is above or in contact with the contact pad; moving a combination of the transfer plate with the micro device thereon and the receiving substrate into a confined space with a relative humidity greater than or equal to about 85% so as to condense some water between the micro device and the contact pad; and attaching the micro device to the contact pad.

METHOD FOR REPLACING OR PATCHING ELEMENT OF DISPLAY DEVICE
20210015011 · 2021-01-14 ·

A method for replacing an element of a display device includes: forming a structure with a first liquid layer between a first micro device and a conductive pad of a substrate in which the first micro device is gripped by a capillary force produced by the first liquid layer; evaporating the first liquid layer such that the first micro device is bound to the substrate; determining if the first micro device is malfunctioned or misplaced; removing the first micro device when the first micro device is malfunctioned or misplaced; forming an another structure with a second liquid layer between a second micro device and the conductive pad of the substrate in which the second micro device is gripped by a capillary force produced by the second liquid layer; and evaporating the second liquid layer such that the second micro device is bound to the substrate.

LIGHT EMITTING DIODE DISPLAY WITH REDUNDANCY SCHEME

A display panel and method of manufacture are described. In an embodiment, a display substrate includes a pixel area and a non-pixel area. An array of subpixels and corresponding array of bottom electrodes are in the pixel area. An array of micro LED devices are bonded to the array of bottom electrodes. One or more top electrode layers are formed in electrical contact with the array of micro LED devices. In one embodiment a redundant pair of micro LED devices are bonded to the array of bottom electrodes. In one embodiment, the array of micro LED devices are imaged to detect irregularities.

Method for transferring structures

The invention relates to a method for transferring structures on a host substrate, the method comprising the following steps in sequence: a) supply a temporary substrate comprising two main faces, the temporary substrate being stretchable, the structures being assembled with their front face on the first face; b) stretch the temporary substrate along at least one direction so as to increase the space between the structures along at least one direction, c) a step for transferring the plurality of structures on a host face of a host substrate, The temporary substrate comprises a matrix made of a stretchable material, and a plurality of inserts on which the structures are assembled, the inserts comprising a material with a Young's Modulus higher than that of the stretchable material.

METHOD FOR FORMING SEMICONDUCTOR STRUCTURE
20200411372 · 2020-12-31 ·

A method for forming a semiconductor structure includes following operations. A first substrate including a first side, a second side opposite to the first side, and a metallic pad disposed over the first side is received. A dielectric structure including a first trench directly above the metallic pad is formed. A second trench is formed in the dielectric structure and a portion of the first substrate. A sacrificial layer is formed to fill the first trench and the second trench. A third trench is formed directly above the metallic pad. A barrier ring and a bonding structure are formed in the third trench. A bonding layer is disposed to bond the first substrate to a second substrate. A portion of the second side of the first substrate is removed to expose the sacrificial layer. The sacrificial layer is removed by an etchant.

MULTI-JUNCTION LED WITH EUTECTIC BONDING AND METHOD OF MANUFACTURING THE SAME
20200402964 · 2020-12-24 ·

Disclosed are multi-junction light emitting diode (LED) formed by using eutectic bonding and method of manufacturing the multi-junction LED. The multi-junction LED is formed by stacking a separately formed light emitting structure on another light emitting structure by using eutectic bonding. Since separately grown light emitting structure is stacked on the light emitting structure using the eutectic metal alloy bonding, it is possible to prevent crystal defects occurring between the light emitting structures when sequentially grown. Further, since the eutectic metal alloy can be formed in various patterns, it is possible to control and optimize adhesive strength, transmittance of the light generated in the upper light emitting structure, and resistance.

METHOD FOR INCREASING SEMICONDUCTOR DEVICE WAFER STRENGTH

A device wafer is provided that includes a substrate having major and minor surfaces, and a plurality of active devices located at the major surface. A eutectic alloy composition is formed at the minor surface of the substrate. The eutectic alloy composition is removed from the minor surface of the substrate such that a portion of the eutectic alloy composition remains at an outer perimeter of the minor surface to strengthen the outer perimeter of the substrate. A bonding layer is deposited over the minor surface and over the portion of the eutectic forming alloy composition at the outer perimeter of the minor surface. The bonding layer is utilized for joining semiconductor components of the device wafer to secondary structures. Additional eutectic alloy composition may remain on the minor surface of the substrate at the streets to strengthen the substrate during device wafer separation.

SEMICONDUCTOR PACKAGE

A semiconductor package according to an embodiment of the present invention Includes: a lead frame comprising a pad and a lead spaced apart from the pad by a regular interval; a semiconductor chip adhered on the pad; and a clip structure electrically connecting the semiconductor chip and the lead, wherein an one end of the clip structure connected to the semiconductor chip inclines with respect to upper surfaces of chip pads of the semiconductor chip and is adhered to the upper surfaces of the chip pads of the semiconductor chip. A semiconductor package according to another embodiment of the present invention includes: a semiconductor chip comprising one or more chip pads; one or more leads electrically connected to the chip pads; and a sealing member covering the semiconductor chip, wherein an one end of the lead inclines with respect to one surface of the chip pad and is adhered to the chip pad and an other end of the lead is exposed to the outside of the sealing member.

SEMICONDUCTOR PACKAGE

A semiconductor package according to an embodiment of the present invention Includes: a lead frame comprising a pad and a lead spaced apart from the pad by a regular interval; a semiconductor chip adhered on the pad; and a clip structure electrically connecting the semiconductor chip and the lead, wherein an one end of the clip structure connected to the semiconductor chip inclines with respect to upper surfaces of chip pads of the semiconductor chip and is adhered to the upper surfaces of the chip pads of the semiconductor chip. A semiconductor package according to another embodiment of the present invention includes: a semiconductor chip comprising one or more chip pads; one or more leads electrically connected to the chip pads; and a sealing member covering the semiconductor chip, wherein an one end of the lead inclines with respect to one surface of the chip pad and is adhered to the chip pad and an other end of the lead is exposed to the outside of the sealing member.