A micro multi-color LED device includes two or more LED structures for emitting a range of colors. The two or more LED structures are vertically stacked to combine light from the two more LED structures. Light from the micro multi-color LED device is emitted substantially vertically upward through each of the LED structures. In some embodiments, each LED structure is connected to a pixel driver and/or a common electrode. The LED structures are bonded together through bonding layers. In some embodiments, planarization layers enclose each of the LED structures or the micro multi-color LED device. In some embodiments, one or more of reflective layers, refractive layers, micro-lenses, spacers, and reflective cup structures are implemented in the device to improve the LED emission efficiency. A display panel comprising an array of the micro tri-color LED devices has a high resolution and a high illumination brightness.

RF transistor amplifiers include an RF transistor amplifier die having a semiconductor layer structure, a coupling element on an upper surface of the semiconductor layer structure, and an interconnect structure on an upper surface of the coupling element so that the RF transistor amplifier die and the interconnect structure are in a stacked arrangement. The coupling element includes a first shielded transmission line structure.

A light emitting device package includes a first molding member surrounding a heat dissipation frame, a first electrode frame, and a second electrode frame; a first semiconductor light emitting device on the heat dissipation frame and having first and second pads; a second semiconductor light emitting device on the heat dissipation frame and having first and second pads; a wavelength conversion layer on the first and second semiconductor light emitting structures; a first bonding wire connected to the first pad of the first semiconductor light emitting device and the first electrode frame; a second bonding wire connected to the second pad of the second semiconductor light emitting device and the second electrode frame; and an inter-chip bonding wire connecting the second pad of the first semiconductor light emitting device to the first pad of the second semiconductor light emitting device.

A light emitting device package includes a first molding member surrounding a heat dissipation frame, a first electrode frame, and a second electrode frame; a first semiconductor light emitting device on the heat dissipation frame and having first and second pads; a second semiconductor light emitting device on the heat dissipation frame and having first and second pads; a wavelength conversion layer on the first and second semiconductor light emitting structures; a first bonding wire connected to the first pad of the first semiconductor light emitting device and the first electrode frame; a second bonding wire connected to the second pad of the second semiconductor light emitting device and the second electrode frame; and an inter-chip bonding wire connecting the second pad of the first semiconductor light emitting device to the first pad of the second semiconductor light emitting device.

A power amplification device includes a first member in which a first circuit is formed, a second member in which a second circuit is formed, and a member-member connection conductor that electrically connects the first circuit and the second circuit to each other. The second member is mounted on the first member. The second circuit includes a first amplifier, which amplifies a radio frequency signal to output a first amplified signal. The first circuit includes a control circuit that controls an operation of the second circuit. At least part of a first termination circuit, which is connected to the first amplifier through the member-member connection conductor and which attenuates a harmonic wave component of the first amplified signal, is formed in the first member.

A semiconductor device having an integrated antenna is provided. The semiconductor device includes a base die having an integrated circuit formed at an active surface and a cap die bonded to the backside surface of the base die. A metal trace is formed over a top surface of the cap die. A cavity is formed under the metal trace. A conductive via is formed through the base die and the cap die interconnecting the metal trace and a conductive trace of the integrated circuit.

A semiconductor device having an integrated antenna is provided. The semiconductor device includes a base die having an integrated circuit formed at an active surface and a cap die bonded to the backside surface of the base die. A metal trace is formed over a top surface of the cap die. A cavity is formed under the metal trace. A conductive via is formed through the base die and the cap die interconnecting the metal trace and a conductive trace of the integrated circuit.

RF transistor amplifiers include an RF transistor amplifier die having a semiconductor layer structure, a coupling element on an upper surface of the semiconductor layer structure, and an interconnect structure on an upper surface of the coupling element so that the RF transistor amplifier die and the interconnect structure are in a stacked arrangement. The coupling element includes a first shielded transmission line structure.

Alignment of devices formed on substrates that are to be bonded may be achieved through the use of scribe lines between the devices, where the scribe lines progressively increase or decrease in size from a center to an edge of one or more of the substrates to compensate for differences in the thermal expansion rates of the substrates. The devices on the substrates are brought into alignment as the substrates are heated during a bonding operation due to the progressively increased or decreased sizes of the scribe lines. The scribe lines may be arranged in a single direction in a substrate to compensate for thermal expansion along a single axis of the substrate or may be arranged in a plurality of directions to compensate for actinomorphic thermal expansion.

A semiconductor package according to an embodiment of the present invention Includes: a lead frame comprising a pad and a lead spaced apart from the pad by a regular interval; a semiconductor chip adhered on the pad; and a clip structure electrically connecting the semiconductor chip and the lead, wherein an one end of the clip structure connected to the semiconductor chip inclines with respect to upper surfaces of chip pads of the semiconductor chip and is adhered to the upper surfaces of the chip pads of the semiconductor chip. A semiconductor package according to another embodiment of the present invention includes: a semiconductor chip comprising one or more chip pads; one or more leads electrically connected to the chip pads; and a sealing member covering the semiconductor chip, wherein an one end of the lead inclines with respect to one surface of the chip pad and is adhered to the chip pad and an other end of the lead is exposed to the outside of the sealing member.