H01L2224/8382

Semiconductor arrangement, laminated semiconductor arrangement and method for fabricating a semiconductor arrangement

A semiconductor arrangement comprises a leadframe comprising at least a first and a second carrier, the first and second carriers being arranged laterally besides each other, at least a first and a second semiconductor die, the first semiconductor die being arranged on and electrically coupled to the first carrier and the second semiconductor die being arranged on and electrically coupled to the second carrier, and an interconnection configured to mechanically fix the first carrier to the second carrier and to electrically insulate the first carrier from the second carrier, wherein the first and second semiconductor dies are at least partially exposed to the outside.

SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING THE SAME, AND SEMICONDUCTOR MODULE

Provided is a semiconductor device free from chipping of a thin semiconductor element during transportation. The semiconductor device includes: a thin semiconductor element including a front-side electrode on the front side of the semiconductor element, and including a back-side electrode on the back side of the semiconductor element; a metallic member formed on at least one of the front-side electrode and the back-side electrode, the metallic member having a thickness equal to or greater than the thickness of the semiconductor element; and a resin member in contact with the lateral side of the metallic member and surrounding the periphery of the metallic member, with a part of the front side of the semiconductor element being exposed.

Process for manufacturing a strained semiconductor device and corresponding strained semiconductor device

A process for manufacturing a strained semiconductor device envisages: providing a die of semiconductor material, in which elementary components of the semiconductor device have been integrated by means of initial front-end steps; and coupling, using the die-attach technique, the die to a support, at a coupling temperature. The aforesaid coupling step envisages selecting the value of the coupling temperature at a value higher than an operating temperature of use of the semiconductor device, and moreover selecting the material of the support so that it is different from the material of the die in order to determine, at the operating temperature, a coupling stress that is a function of the different values of the coefficients of thermal expansion of the materials of the die and of the support and of the temperature difference between the coupling temperature and the operating temperature. Furthermore, additional stress can be enhanced by means of different embodiments involving the support, such as ring or multi-layer frame.

Semiconductor device and semiconductor device package

A semiconductor device according to the embodiment may include a light emitting structure including a first conductivity type semiconductor layer, a second conductivity type semiconductor layer; a first bonding pad disposed on the light emitting structure and electrically connected to the first conductivity type semiconductor layer; a second bonding pad disposed on the light emitting structure and spaced apart from the first bonding pad, and electrically connected to the second conductivity type semiconductor layer; and a reflective layer disposed on the light emitting structure and disposed between the first bonding pad and the second bonding pad. According to the semiconductor device of the embodiment, each of the first bonding pad and the second bonding pad includes a porous metal layer having a plurality of pores and a bonding alloy layer disposed on the porous metal layer.

SEMICONDUCTOR DEVICE INCLUDING AN EMBEDDED SEMICONDUCTOR DIE AND A METHOD FOR FABRICATING THE SAME

A semiconductor device includes a die carrier, a semiconductor die disposed on a main face of the die carrier, the semiconductor die including one or more contact pads, an encapsulant covering at least partially the semiconductor die and at least a portion of the main face of the die carrier, an insulation layer covering the encapsulant, and one or more electrical interconnects, each being connected with one of the one or more contact pads of the semiconductor die and extending through the encapsulant.

Power Semiconductor Device and Method for Fabricating a Power Semiconductor Device

A SiC power semiconductor device includes: a power semiconductor die including SiC and a metallization layer, wherein the metallization layer includes a first metal; a die carrier, wherein the power semiconductor die is arranged over the die carrier such that the metallization layer faces the die carrier, the die carrier being at least partially covered by a plating that includes Ni; and a first intermetallic compound arranged between the power semiconductor die and the plating and including Ni.sub.3Sn.sub.4.

Semiconductor device and method for fabricating a semiconductor device

A semiconductor device includes: a carrier having a die pad and a contact; a semiconductor die having opposing first and second main sides and being attached to the die pad by a first solder joint such that the second main side faces the die pad; and a contact clip having a first contact region and a second contact region. The first contact is attached to the first main side by a second solder joint. The second contact region is attached to the contact by a third solder joint. The first contact region has a convex shape facing towards the first main side such that a distance between the first main side and the first contact region increases from a base of the convex shape towards an edge of the first contact region. The base runs along a line that is substantially perpendicular to a longitudinal axis of the contact clip.

Process for forming an electric heater

A process for forming an electric heater comprising the steps: (a) providing a heater element and a power supply, (b) applying a layer of a copper paste onto the heater element and/or the power supply and drying the applied layer of copper paste, (c1) applying a solder agent onto the dried copper paste and appropriately arranging the heater element and the power supply such that the heater element and the power supply contact each other by means of the dried copper paste and the solder agent or (c2) appropriately arranging the heater element and the power supply such that the heater element and the power supply contact each other by means of the dried copper paste, and applying a solder agent next to the dried copper paste or (c3) if in step (b) the copper paste has been applied only onto the heater element and then dried, applying a solder agent onto the power supply and appropriately arranging the heater element and the power supply such that the heater element and the power supply contact each other by means of the dried copper paste and the solder agent or (c4) if in step (b) the copper paste has been applied only onto the power supply and then dried, applying a solder agent onto the heater element and appropriately arranging the heater element and the power supply such that the heater element and the power supply contact each other by means of the dried copper paste and the solder agent, and (d) diffusion soldering the arrangement produced in step (c1), (c2), (c3) or (c4) to form a connection between the heater element and the power supply, wherein the copper paste comprises or consists of (i) 66-99 wt.-% of at least one type of particles selected from the group consisting of copper particles, copper-rich copper/zinc alloy particles, and copper-rich copper/tin alloy particles, (ii) 0-20 wt.-% of at least one type of solder particles selected from the group consisting of tin particles, tin-rich tin/copper alloy particles, tin-rich tin/silver alloy particles, and tin-rich tin/copper/silver alloy particles, and (iii) 1-20 wt.-% of a vehicle.

SEMICONDUCTOR DEVICE
20210305204 · 2021-09-30 ·

A semiconductor device according to an embodiment includes a semiconductor layer, a metal layer, and a bonding layer provided between the semiconductor layer and the metal layer, the bonding layer including a plurality of silver particles, and the bonding layer including a region containing gold existing between the plurality of silver particles.

SEMICONDUCTOR DEVICE
20210305204 · 2021-09-30 ·

A semiconductor device according to an embodiment includes a semiconductor layer, a metal layer, and a bonding layer provided between the semiconductor layer and the metal layer, the bonding layer including a plurality of silver particles, and the bonding layer including a region containing gold existing between the plurality of silver particles.