Patent classifications
H01L2224/8388
3D IC decoupling capacitor structure and method for manufacturing the same
A semiconductor structure is disclosed. The semiconductor structure includes: a polymer base layer; a backside redistribution layer (RDL) over the polymer base layer; a molding layer over the backside RDL; a polymer layer over the molding layer; a front side RDL over the polymer layer; and a metal-insulator-metal (MIM) capacitor vertically passing through the molding layer, the MIM capacitor including a first electrode, an insulation layer and a second electrode, wherein the insulation layer surrounds the first electrode, and the second electrode surrounds the insulation layer, and the molding layer surrounds the second electrode. An associated method for manufacturing a semiconductor structure is also disclosed.
A-staged thermoplastic-polyimide (TPI) adhesive compound containing flat inorganic particle fillers and method of use
A compound and method of use thereof consisting of an A-staged thermoplastic-polyimide (TPI) adhesive, a viscous uncured liquid of polyamic-acid polymer (PAA), the TPI precursor, synthesized and dissolved in a polar aprotic organic solvent, and including, as appropriate, combinations of flat particulate inorganic ceramic and/or metallic electrically insulating, and/or electrically conducting, and/or thermally conducting fillers for interface-bonding to create a robust joint between surfaces with conventional lamination processes that utilize relatively moderate temperatures and applied pressures, such particles resulting in the reduction of the occurrence and size of gas voids within the adhesive bondline.
A-staged thermoplastic-polyimide (TPI) adhesive compound containing flat inorganic particle fillers and method of use
A compound and method of use thereof consisting of an A-staged thermoplastic-polyimide (TPI) adhesive, a viscous uncured liquid of polyamic-acid polymer (PAA), the TPI precursor, synthesized and dissolved in a polar aprotic organic solvent, and including, as appropriate, combinations of flat particulate inorganic ceramic and/or metallic electrically insulating, and/or electrically conducting, and/or thermally conducting fillers for interface-bonding to create a robust joint between surfaces with conventional lamination processes that utilize relatively moderate temperatures and applied pressures, such particles resulting in the reduction of the occurrence and size of gas voids within the adhesive bondline.
SEMICONDUCTOR PACKAGE
A semiconductor package includes a package substrate, a lower semiconductor chip on the package substrate, a heat emission member on the lower semiconductor chip, the heat emission member having a horizontal unit and a vertical unit connected to the horizontal unit, a first semiconductor chip stack and a second semiconductor chip stack on the horizontal unit, and a molding member that surrounds the lower semiconductor chip, the first and second semiconductor chip stacks, and the heat emission member. The vertical unit may be arranged between the first semiconductor chip stack and the second semiconductor chip stack, and an upper surface of the vertical unit may be exposed in the molding member.
SEMICONDUCTOR PACKAGE
A semiconductor package includes a package substrate, a lower semiconductor chip on the package substrate, a heat emission member on the lower semiconductor chip, the heat emission member having a horizontal unit and a vertical unit connected to the horizontal unit, a first semiconductor chip stack and a second semiconductor chip stack on the horizontal unit, and a molding member that surrounds the lower semiconductor chip, the first and second semiconductor chip stacks, and the heat emission member. The vertical unit may be arranged between the first semiconductor chip stack and the second semiconductor chip stack, and an upper surface of the vertical unit may be exposed in the molding member.
SEMICONDUCTOR DEVICES AND SEMICONDUCTOR DEVICES INCLUDING A REDISTRIBUTION LAYER
A method of forming a conductive material on a semiconductor device. The method comprises removing at least a portion of a conductive pad within an aperture in a dielectric material over a substrate. The method further comprises forming a seed material at least within a bottom of the aperture and over the dielectric material, forming a protective material over the seed material within the aperture, and forming a conductive pillar in contact with the seed material through an opening in the protective material over surfaces of the seed material within the aperture. A method of forming an electrical connection between adjacent semiconductor devices, and a semiconductor device, are also described.
SEMICONDUCTOR DEVICES AND SEMICONDUCTOR DEVICES INCLUDING A REDISTRIBUTION LAYER
A method of forming a conductive material on a semiconductor device. The method comprises removing at least a portion of a conductive pad within an aperture in a dielectric material over a substrate. The method further comprises forming a seed material at least within a bottom of the aperture and over the dielectric material, forming a protective material over the seed material within the aperture, and forming a conductive pillar in contact with the seed material through an opening in the protective material over surfaces of the seed material within the aperture. A method of forming an electrical connection between adjacent semiconductor devices, and a semiconductor device, are also described.
SEMICONDUCTOR PACKAGE
A semiconductor package includes a semiconductor chip that includes a first region and a second region spaced apart from the first region; a plurality of connection bumps disposed under the first region of the semiconductor chip; and a protection layer that covers a bottom surface of the semiconductor chip in the second region, wherein the protection layer does not cover the bottom surface of the semiconductor chip in the first region and is not disposed between the plurality of connection bumps. The semiconductor chip of the semiconductor package is protected by the protection layer.
DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME
A display apparatus includes a display panel including a lower base substrate and a connecting portion disposed on the lower base substrate, a flexible circuit board attached on a side surface of the display panel, and including a base film and a conductive pattern disposed on the base film, a conductive paste part disposed between the side surface of the display panel and the flexible circuit board, a first anisotropic conductive film (ACF) film disposed between the side surface of the display panel and the conductive paste part, and a second ACF film disposed between the conductive paste part and the flexible circuit board. The connecting portion is exposed at the side surface of the display panel, and the first ACF film directly makes contact with the connecting portion.
DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME
A display apparatus includes a display panel including a lower base substrate and a connecting portion disposed on the lower base substrate, a flexible circuit board attached on a side surface of the display panel, and including a base film and a conductive pattern disposed on the base film, a conductive paste part disposed between the side surface of the display panel and the flexible circuit board, a first anisotropic conductive film (ACF) film disposed between the side surface of the display panel and the conductive paste part, and a second ACF film disposed between the conductive paste part and the flexible circuit board. The connecting portion is exposed at the side surface of the display panel, and the first ACF film directly makes contact with the connecting portion.