H01L2224/8388

METHOD OF DEPOSITION OF A THERMAL INTERFACE MATERIAL ONTO A CIRCUIT ASSEMBLY AND AN INTEGRATED CIRCUIT FORMED THEREFROM

A method of deposition of a thermal interface material onto a circuit assembly and an integrated circuit formed therefrom is provided. The method includes depositing a thermal interface material at a first layer thickness between a first layer of a circuit assembly and a second layer of the circuit assembly. The thermal interface material includes an emulsion of liquid metal droplets and polymer. The first layer thickness is at least 1.1 times a D.sub.90 of the liquid metal droplets prior to compressing the circuit assembly. The method includes compressing the circuit assembly to decrease the first layer thickness to a second layer thickness, thereby deforming the liquid metal droplets. The second layer thickness is no greater than a D.sub.90 of the liquid metal droplets in thermal interface material prior to compressing the circuit assembly.

3D-joining of microelectronic components with conductively self-adjusting anisotropic matrix
10297570 · 2019-05-21 · ·

An adhesive with self-connecting interconnects is provided. The adhesive layer provides automatic 3D joining of microelectronic components with a conductively self-adjusting anisotropic matrix. In an implementation, the adhesive matrix automatically makes electrical connections between two surfaces that have opposing electrical contacts, and bonds the two surfaces together. Conductive members in the adhesive matrix are aligned to automatically establish electrical connections between at least partially aligned contacts on each of the two surfaces while providing nonconductive adhesion between parts of the two surfaces lacking aligned contacts. An example method includes forming an adhesive matrix between two surfaces to be joined, including conductive members anisotropically aligned in an adhesive medium, then pressing the two surfaces together to automatically connect corresponding electrical contacts that are at least partially aligned on the two surfaces. The adhesive medium in the matrix secures the two surfaces together.

3D-joining of microelectronic components with conductively self-adjusting anisotropic matrix
10297570 · 2019-05-21 · ·

An adhesive with self-connecting interconnects is provided. The adhesive layer provides automatic 3D joining of microelectronic components with a conductively self-adjusting anisotropic matrix. In an implementation, the adhesive matrix automatically makes electrical connections between two surfaces that have opposing electrical contacts, and bonds the two surfaces together. Conductive members in the adhesive matrix are aligned to automatically establish electrical connections between at least partially aligned contacts on each of the two surfaces while providing nonconductive adhesion between parts of the two surfaces lacking aligned contacts. An example method includes forming an adhesive matrix between two surfaces to be joined, including conductive members anisotropically aligned in an adhesive medium, then pressing the two surfaces together to automatically connect corresponding electrical contacts that are at least partially aligned on the two surfaces. The adhesive medium in the matrix secures the two surfaces together.

Semiconductor devices including conductive pillars

A method of forming a conductive material on a semiconductor device. The method comprises removing at least a portion of a conductive pad within an aperture in a dielectric material over a substrate. The method further comprises forming a seed material at least within a bottom of the aperture and over the dielectric material, forming a protective material over the seed material within the aperture, and forming a conductive pillar in contact with the seed material through an opening in the protective material over surfaces of the seed material within the aperture. A method of forming an electrical connection between adjacent semiconductor devices, and a semiconductor device, are also described.

Semiconductor devices including conductive pillars

A method of forming a conductive material on a semiconductor device. The method comprises removing at least a portion of a conductive pad within an aperture in a dielectric material over a substrate. The method further comprises forming a seed material at least within a bottom of the aperture and over the dielectric material, forming a protective material over the seed material within the aperture, and forming a conductive pillar in contact with the seed material through an opening in the protective material over surfaces of the seed material within the aperture. A method of forming an electrical connection between adjacent semiconductor devices, and a semiconductor device, are also described.

SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THEREOF

A semiconductor device comprises a semiconductor die, comprising a stacking structure, a first bonding pad with a first bonding surface positioned away from the stack structure, and a second bonding pad; a carrier comprising a connecting surface; a third bonding pad which comprises a second bonding surface and is arranged on the connecting surface, and a fourth bonding pad arranged on the connecting surface of the carrier; and a conductive connecting layer comprising a first conductive part, comprising a first outer contour, and formed between and directly contacting the first bonding pad and the third bonding pad; a second conductive part formed between the second bonding pad and the fourth bonding pad; and a blocking part covering the first conductive part to form a covering area, wherein the first bonding surface comprises a first position which is the closest to the carrier within the covering area and a second position which is the farthest from the carrier within the covering area in a cross section view, and a distance from the first position to the first out contour is greater than that from the second position to the first outer contour.

Display apparatus and method of manufacturing the same

A display apparatus includes a display panel including a lower base substrate and a connecting portion disposed on the lower base substrate, a flexible circuit board attached on a side surface of the display panel, and including a base film and a conductive pattern disposed on the base film, a conductive paste part disposed between the side surface of the display panel and the flexible circuit board, a first anisotropic conductive film (ACF) film disposed between the side surface of the display panel and the conductive paste part, and a second ACF film disposed between the conductive paste part and the flexible circuit board. The connecting portion is exposed at the side surface of the display panel, and the first ACF film directly makes contact with the connecting portion.

Display apparatus and method of manufacturing the same

A display apparatus includes a display panel including a lower base substrate and a connecting portion disposed on the lower base substrate, a flexible circuit board attached on a side surface of the display panel, and including a base film and a conductive pattern disposed on the base film, a conductive paste part disposed between the side surface of the display panel and the flexible circuit board, a first anisotropic conductive film (ACF) film disposed between the side surface of the display panel and the conductive paste part, and a second ACF film disposed between the conductive paste part and the flexible circuit board. The connecting portion is exposed at the side surface of the display panel, and the first ACF film directly makes contact with the connecting portion.

CHIP PACKAGING APPARATUS AND METHOD THEREOF
20190080942 · 2019-03-14 ·

Disclosed is a chip packaging apparatus. The chip packaging apparatus comprises: at least one chip supplying device; at least one chip processing device configured to process a chip supplied by a corresponding chip supplying device; and at least one chip transferring device, wherein each chip transferring device has a plurality of bonding heads, and each of the bonding heads is used to transfer one chip processed by a corresponding chip processing device. Each chip processing device comprises at least two pick-up platforms, each of the pick-up platforms is configured such that multiple chips can be simultaneously provided thereon, and the plurality of bonding heads on a corresponding chip transferring device is configured to simultaneously pick up multiple chips from each pick-up platform in one operation. A method for packaging chips is also disclosed.

Electronic sub-assembly and method for the production of an electronic sub-assembly

An electronic sub-assembly (36) comprising at least one electronic component (14) embedded in a sequence of layers, wherein the electronic component (14) is arranged in a recess of an electrically conductive central layer (16) and directly adjoins a resin layer (12, 20) on each side.