H01L2224/8388

PRINTED CIRCUIT BOARD AND ELECTRONIC COMPONENT PACKAGE INCLUDING THE SAME

A printed circuit board includes: a first insulating layer; a first cavity disposed in one surface of the first insulating layer; a plurality of protrusion portions spaced apart from each other in the first cavity; and a first wiring layer embedded in the one surface of the first insulating layer.

PRINTED CIRCUIT BOARD AND ELECTRONIC COMPONENT PACKAGE INCLUDING THE SAME

A printed circuit board includes: a first insulating layer; a first cavity disposed in one surface of the first insulating layer; a plurality of protrusion portions spaced apart from each other in the first cavity; and a first wiring layer embedded in the one surface of the first insulating layer.

Chip packaging apparatus and method thereof
11189507 · 2021-11-30 · ·

Disclosed is a chip packaging apparatus. The chip packaging apparatus comprises: at least one chip supplying device; at least one chip processing device configured to process a chip supplied by a corresponding chip supplying device; and at least one chip transferring device, wherein each chip transferring device has a plurality of bonding heads, and each of the bonding heads is used to transfer one chip processed by a corresponding chip processing device. Each chip processing device comprises at least two pick-up platforms, each of the pick-up platforms is configured such that multiple chips can be simultaneously provided thereon, and the plurality of bonding heads on a corresponding chip transferring device is configured to simultaneously pick up multiple chips from each pick-up platform in one operation. A method for packaging chips is also disclosed.

METHODS OF MANUFACTURING STACKED SEMICONDUCTOR DIE ASSEMBLIES WITH HIGH EFFICIENCY THERMAL PATHS

Method for packaging a semiconductor die assemblies. In one embodiment, a method is directed to packaging a semiconductor die assembly having a first die and a plurality of second dies arranged in a stack over the first die, wherein the first die has a peripheral region extending laterally outward from the stack of second dies. The method can comprise coupling a thermal transfer structure to the peripheral region of the first die and flowing an underfill material between the second dies. The underfill material is flowed after coupling the thermal transfer structure to the peripheral region of the first die such that the thermal transfer structure limits lateral flow of the underfill material.

Anisotropically conductive moisture barrier films and electro-optic assemblies containing the same
11782322 · 2023-10-10 · ·

An electro-optic assembly includes a layer of electro-optic material configured to switch optical states upon application of an electric field and an anisotropically conductive layer having one or more moisture-resistive polymers and a conductive material, the moisture-resistive polymer having a WVTR less than 5 g/(m.sup.2*d).

Methods of manufacturing stacked semiconductor die assemblies with high efficiency thermal paths

Method for packaging a semiconductor die assemblies. In one embodiment, a method is directed to packaging a semiconductor die assembly having a first die and a plurality of second dies arranged in a stack over the first die, wherein the first die has a peripheral region extending laterally outward from the stack of second dies. The method can comprise coupling a thermal transfer structure to the peripheral region of the first die and flowing an underfill material between the second dies. The underfill material is flowed after coupling the thermal transfer structure to the peripheral region of the first die such that the thermal transfer structure limits lateral flow of the underfill material.

SEMICONDUCTOR DEVICE AND A METHOD OF MANUFACTURING THEREOF

A semiconductor device comprises a semiconductor die, comprising a stacking structure, a first bonding pad with a first bonding surface positioned away from the stack structure, and a second bonding pad; a carrier comprising a connecting surface; a third bonding pad which comprises a second bonding surface and is arranged on the connecting surface, and a fourth bonding pad arranged on the connecting surface of the carrier; and a conductive connecting layer comprising a first conductive part, comprising a first outer contour, and formed between and directly contacting the first bonding pad and the third bonding pad; a second conductive part formed between the second bonding pad and the fourth bonding pad; and a blocking part covering the first conductive part to form a covering area, wherein the first bonding surface comprises a first position which is the closest to the carrier within the covering area and a second position which is the farthest from the carrier within the covering area in a cross section view, and a distance from the first position to the first out contour is greater than that from the second position to the first outer contour.

Semiconductor device and a method of manufacturing thereof

A semiconductor device comprises a semiconductor die, comprising a stacking structure, a first bonding pad with a first bonding surface positioned away from the stack structure, and a second bonding pad; a carrier comprising a connecting surface; a third bonding pad which comprises a second bonding surface and is arranged on the connecting surface, and a fourth bonding pad arranged on the connecting surface of the carrier; and a conductive connecting layer comprising a first conductive part, comprising a first outer contour, and formed between and directly contacting the first bonding pad and the third bonding pad; a second conductive part formed between the second bonding pad and the fourth bonding pad; and a blocking part covering the first conductive part to form a covering area, wherein the first bonding surface comprises a first position which is the closest to the carrier within the covering area and a second position which is the farthest from the carrier within the covering area in a cross section view, and a distance from the first position to the first out contour is greater than that from the second position to the first outer contour.

POWER ENHANCED STACKED CHIP SCALE PACKAGE SOLUTION WITH INTEGRATED DIE ATTACH FILM
20220230995 · 2022-07-21 · ·

An apparatus comprising: a die stack comprising at least one die pair, the at least one die pair having a first die over a second die, the first die and the second die both having a first surface and a second surface, the second surface of the first die over the first surface of the second die; and an adhesive film between the first die and the second die of the at least one die pair; wherein the adhesive film comprises an insulating layer and a conductive layer, the insulating layer adhering to the second surface of the first die and the conductive layer adhering to the first surface of the second die.

LIGHT INDUCED SELECTIVE TRANSFER OF COMPONENTS BETWEEN SUBSTRATES
20220216087 · 2022-07-07 ·

A method and apparatus for transferring components. A first substrate is provided with the components. A second substrate is provided with an adhesive layer comprising a hot melt adhesive material. The components on the first substrate are contacted with the adhesive layer on the second substrate while the adhesive layer is melted. The adhesive layer is allowed to solidify to form an adhesive connection between the components and the second substrate. The first and second substrates are moved apart to transfer the components. At least a subset of the components is transferred from the second substrate to a third substrate by radiating light onto the adhesive layer to form a jet of melted material carrying the components.