H01L2224/83895

DISPLAY DEVICE
20210265540 · 2021-08-26 ·

A display device comprising: a first substrate; a plurality of pixels provided to the first substrate; a light emitting element provided to each of the pixels; a phosphor layer covering at least an upper surface of the light emitting element; a first reflective layer facing a side surface of the light emitting element; and a second reflective layer provided to a side surface of the phosphor layer, separated from the first reflective layer in a normal direction of the first substrate, and disposed farther away from the first substrate than the first reflective layer.

INTEGRATED WHITE LIGHT SOURCE USING A LASER DIODE AND A PHOSPHOR IN A SURFACE MOUNT DEVICE PACKAGE

The embodiments described herein provide a device and method for an integrated white colored electromagnetic radiation source using a combination of laser diode excitation sources based on gallium and nitrogen containing materials and light emitting source based on phosphor materials. A violet, blue, or other wavelength laser diode source based on gallium and nitrogen materials may be closely integrated with phosphor materials, such as yellow phosphors, to form a compact, high-brightness, and highly-efficient, white light source. The phosphor material is provided with a plurality of scattering centers scribed on an excitation surface or inside bulk of a plate to scatter electromagnetic radiation of a laser beam from the excitation source incident on the excitation surface to enhance generation and quality of an emitted light from the phosphor material for outputting a white light emission either in reflection mode or transmission mode.

INTEGRATED WHITE LIGHT SOURCE USING A LASER DIODE AND A PHOSPHOR IN A SURFACE MOUNT DEVICE PACKAGE

The embodiments described herein provide a device and method for an integrated white colored electromagnetic radiation source using a combination of laser diode excitation sources based on gallium and nitrogen containing materials and light emitting source based on phosphor materials. A violet, blue, or other wavelength laser diode source based on gallium and nitrogen materials may be closely integrated with phosphor materials, such as yellow phosphors, to form a compact, high-brightness, and highly-efficient, white light source. The phosphor material is provided with a plurality of scattering centers scribed on an excitation surface or inside bulk of a plate to scatter electromagnetic radiation of a laser beam from the excitation source incident on the excitation surface to enhance generation and quality of an emitted light from the phosphor material for outputting a white light emission either in reflection mode or transmission mode.

THREE-DIMENSIONAL MEMORY DEVICE WITH THREE-DIMENSIONAL PHASE-CHANGE MEMORY
20210151413 · 2021-05-20 · ·

Three-dimensional (3D) memory devices with 3D phase-change memory (PCM) and methods for forming and operating the 3D memory devices are disclosed. In an example, a 3D memory device includes a first semiconductor structure including a substrate, an array of NAND memory cells above the substrate, and a first bonding layer above the array of NAND memory cells. The first bonding layer includes first bonding contacts. The 3D memory device also further includes a second semiconductor structure including a second bonding layer above the first bonding layer and including second bonding contacts, a peripheral circuit and an array of PCM cells above the second bonding layer, and a semiconductor layer above and in contact with the peripheral circuit. The 3D memory device further includes a bonding interface between the first and second bonding layers. The first bonding contacts are in contact with the second bonding contacts at the bonding interface.

Integration of three-dimensional NAND memory devices with multiple functional chips
11031377 · 2021-06-08 · ·

Embodiments of three-dimensional semiconductor devices and fabrication methods are disclosed. The method includes forming a first and a second memory chips and a microprocessor chip. The method also includes bonding a first interconnect layer of the first memory chip with a second interconnect layer of the second memory chip, such that one or more first memory cells of the first memory chip are electrically connected with one or more second memory cells of the second memory chip through interconnect structures of the first and second interconnect layers. The method further includes bonding a third interconnect layer of the microprocessor chip with a substrate of the second memory chip, such that the one or more microprocessor devices of the microprocessor chip are electrically connected with one or more second memory cell of the second memory chip through interconnect structures of the second and third interconnect layers.

SEMICONDUCTOR DEVICE INCLUDING AN ELECTRICAL CONTACT WITH A METAL LAYER ARRANGED THEREON

A semiconductor device includes a semiconductor die, an electrical contact arranged on a surface of the semiconductor die, and a metal layer arranged on the electrical contact, wherein the metal layer includes a singulated part of at least one of a metal foil, a metal sheet, a metal leadframe, or a metal plate. When viewed in a direction perpendicular to the surface of the semiconductor die, a footprint of the electrical contact and a footprint of the metal layer are substantially congruent.

SEMICONDUCTOR DEVICE INCLUDING AN ELECTRICAL CONTACT WITH A METAL LAYER ARRANGED THEREON

A semiconductor device includes a semiconductor die, an electrical contact arranged on a surface of the semiconductor die, and a metal layer arranged on the electrical contact, wherein the metal layer includes a singulated part of at least one of a metal foil, a metal sheet, a metal leadframe, or a metal plate. When viewed in a direction perpendicular to the surface of the semiconductor die, a footprint of the electrical contact and a footprint of the metal layer are substantially congruent.

PROCESSED STACKED DIES

Representative implementations of techniques and methods include processing singulated dies in preparation for bonding. A plurality of semiconductor die components may be singulated from a wafer component, the semiconductor die components each having a substantially planar surface. Particles and shards of material may be removed from edges of the plurality of semiconductor die component. Additionally, one or more of the plurality of semiconductor die components may be bonded to a prepared bonding surface, via the substantially planar surface.

METHOD OF MANUFACTURING AN ELECTRONIC DEVICE

There is provided a method for manufacturing an electronic device including a substrate of semiconductor material, an intermediate portion, and a silicon carbide layer, the method including transferring the silicon carbide layer from a first electronic element onto a face of a second electronic element including the substrate, the transfer including: providing the first element including a primary silicon carbide-based layer, a first diffusion barrier portion, and a first metal layer; providing the second element including the substrate, a second diffusion barrier portion, and a second metal layer; and bonding an exposed face of each of the first and the second metal layers, the first and the second metal layers being formed of tungsten, the first and the second portions being formed of at least one tungsten silicide layer, and the second portion, the second metal layer, the first metal layer, and the first portion form the intermediate portion.

MIXED HYBRID BONDING STRUCTURES AND METHODS OF FORMING THE SAME

Embodiments include a mixed hybrid bonding structure comprising a composite dielectric layer, where the composite dielectric layer comprises an organic dielectric material having a plurality of inorganic filler material. One or more conductive substrate interconnect structures are within the composite dielectric layer. A die is on the composite dielectric layer, the die having one or more conductive die interconnect structures within a die dielectric material. The one or more conductive die interconnect structures are directly bonded to the one or more conductive substrate interconnect structures, and the inorganic filler material of the composite dielectric layer is bonded to the die dielectric material.