H01L2224/83895

CURING PRE-APPLIED AND LASER-ABLATED UNDERFILL VIA A LASER

The invention is directed towards enhanced systems and methods for employing a pulsed photon (or EM energy) source, such as but not limited to a laser, to electrically couple, bond, and/or affix the electrical contacts of a semiconductor device to the electrical contacts of another semiconductor devices. Full or partial rows of LEDs are electrically coupled, bonded, and/or affixed to a backplane of a display device. The LEDs may be μLEDs. The pulsed photon source is employed to irradiate the LEDs with scanning photon pulses. The EM radiation is absorbed by either the surfaces, bulk, substrate, the electrical contacts of the LED, and/or electrical contacts of the backplane to generate thermal energy that induces the bonding between the electrical contacts of the LEDs' electrical contacts and backplane's electrical contacts. The temporal and spatial profiles of the photon pulses, as well as a pulsing frequency and a scanning frequency of the photon source, are selected to control for adverse thermal effects.

MACROCHIP WITH INTERCONNECT STACK FOR POWER DELIVERY AND SIGNAL ROUTING
20230352415 · 2023-11-02 · ·

A device may include a host substrate with two or more circuit regions, one or more first stacks electrically connected to the circuit regions, and one or more second stacks providing electrical connections between the circuit regions. At least some of the second stacks may include an insulator wafer bonded to a die, where the die is bonded to at least one of the circuit regions. At least one of the second stacks may include a power distribution pathway to provide the electrical power to at least one of the circuit regions, which may include includes electrically-conductive vias through the insulator wafer and the die or capacitors in the die. Further, the die of at least one of the one or more second stacks may include electrical pathways to provide electrical connections between at least two of the two or more circuit regions.

Method of manufacturing a semiconductor device including bonding layer and adsorption layer

A semiconductor device includes a first adsorption layer, a first bonding layer, a second bonding layer, and a second adsorption layer stacked on a first substrate, and a conductive pattern structure penetrating through the first adsorption layer, the first bonding layer, the second bonding layer and the second adsorption layer. The first and second bonding layers are in contact with each other, and each of the first and second adsorption layers includes a low-κ dielectric material.

Curing pre-applied and plasma-etched underfill via a laser

The invention is directed towards enhanced systems and methods for employing a pulsed photon (or EM energy) source, such as but not limited to a laser, to electrically couple, bond, and/or affix the electrical contacts of a semiconductor device to the electrical contacts of another semiconductor devices. Full or partial rows of LEDs are electrically coupled, bonded, and/or affixed to a backplane of a display device. The LEDs may be μLEDs. The pulsed photon source is employed to irradiate the LEDs with scanning photon pulses. The EM radiation is absorbed by either the surfaces, bulk, substrate, the electrical contacts of the LED, and/or electrical contacts of the backplane to generate thermal energy that induces the bonding between the electrical contacts of the LEDs' electrical contacts and backplane's electrical contacts. The temporal and spatial profiles of the photon pulses, as well as a pulsing frequency and a scanning frequency of the photon source, are selected to control for adverse thermal effects.

METHOD OF REMOVING A SUBSTRATE

A method of removing a substrate, comprising: forming a growth restrict mask with a plurality of striped opening areas directly or indirectly upon a GaN-based substrate; and growing a plurality of semiconductor layers upon the GaN-based substrate using the growth restrict mask, such that the growth extends in a direction parallel to the striped opening areas of the growth restrict mask, and growth is stopped before the semiconductor layers coalesce, thereby resulting in island-like semiconductor layers. A device is processed for each of the island-like semiconductor layers. Etching is performed until at least a part of the growth restrict mask is exposed. The devices are then bonded to a support substrate. The GaN-based substrate is removed from the devices by a wet etching technique that at least partially dissolves the growth restrict mask. The GaN substrate that is removed then can be recycled.

SEAL RING STRUCTURES AND METHODS OF FORMING SAME
20220278090 · 2022-09-01 ·

Some embodiments relate to a three-dimensional (3D) integrated circuit (IC). The 3D IC includes a first IC die comprising a first semiconductor substrate, and a first interconnect structure over the first semiconductor substrate. The 3D IC also includes a second IC die comprising a second semiconductor substrate, and a second interconnect structure that separates the second semiconductor substrate from the first interconnect structure. A seal ring structure separates the first interconnect structure from the second interconnect structure and perimetrically surrounds a gas reservoir between the first IC die and second IC die. The seal ring structure includes a sidewall gas-vent opening structure configured to allow gas to pass between the gas reservoir and an ambient environment surrounding the 3D IC.

Bonding with Pre-Deoxide Process and Apparatus for Performing the Same

A method includes picking up a first package component, removing an oxide layer on an electrical connector of the first package component, placing the first package component on a second package component after the oxide layer is removed, and bonding the first package component to the second package component.

Hybrid bonding using dummy bonding contacts

Embodiments of bonded semiconductor structures and fabrication methods thereof are disclosed. In an example, a method for forming a semiconductor device is disclosed. A first interconnect layer including first interconnects is formed above a first substrate. A first bonding layer including first bonding contacts is formed above the first interconnect layer, such that each first interconnect is in contact with a respective first bonding contact. A second interconnect layer including second interconnects is formed above a second substrate. A second bonding layer including second bonding contacts is formed above the second interconnect layer, such that at least one second bonding contact is in contact with a respective second interconnect, and at least another second bonding contact is separated from the second interconnects. The first and second substrates are bonded in a face-to-face manner, such that each first bonding contact is in contact with one second bonding contact at a bonding interface.

BONDING APPARATUS, BONDING SYSTEM, AND BONDING METHOD
20220302077 · 2022-09-22 ·

A bonding apparatus includes a first holder configured to hold a first substrate divided into multiple chips with a tape and a ring frame therebetween, the first substrate being attached to the tape, and an edge of the tape being attached to the ring frame; a second holder configured to hold a second substrate, which is disposed on an opposite side to the tape with respect to the first substrate therebetween, while maintaining a distance from the first substrate; and a pressing device configured to press the multiple chips one by one with the tape therebetween to press and bond the corresponding chip to the second substrate.

SEMICONDUCTOR DEVICES INCLUDING BONDING LAYER AND ADSORPTION LAYER

A semiconductor device includes a first adsorption layer, a first bonding layer, a second bonding layer, and a second adsorption layer stacked on a first substrate, and a conductive pattern structure penetrating through the first adsorption layer, the first bonding layer, the second bonding layer and the second adsorption layer. The first and second bonding layers are in contact with each other, and each of the first and second adsorption layers includes a low-κ dielectric material.