H01L2224/83911

CONTROL OF UNDER-FILL USING UNDER-FILL DEFLASH FOR A DUAL-SIDED BALL GRID ARRAY PACKAGE
20180226272 · 2018-08-09 ·

Described herein methods of manufacturing dual-sided packaged electronic modules that control the distribution of an under-fill material between one or more components and a packaging substrate. The disclosed technologies include under-filling one or more components and deflashing a portion of the under-fill to remove under-fill material prior to attaching solder balls. The deflashing step removes a thin layer of under-fill material that may have coated contact pads for the ball grid array. Because the solder balls are not present during under-fill, there is little capillary action drawing material away from the components being under-filled. This can reduce the frequency of voids under the components being under-filled. Accordingly, the disclosed technologies control under-fill for dual-sided ball grid array packages using under-fill deflash prior to attaching solder balls of the ball grid array.

CONTROL OF UNDER-FILL USING A DAM ON A PACKAGING SUBSTRATE FOR A DUAL-SIDED BALL GRID ARRAY PACKAGE
20180226273 · 2018-08-09 ·

Described herein are methods of manufacturing dual-sided packaged electronic modules to control the distribution of an under-fill material between one or more components and a packaging substrate. The disclosed technologies include using a dam on a packaging substrate that is configured to prevent or limit the flow of a capillary under-fill material. This can prevent or limit the capillary under-fill material from flowing onto or contacting other components or elements on the packaging substrate, such as solder balls of a ball-grid array. Accordingly, the disclosed technologies control under-fill for dual-sided ball grid array packages using a dam on a packaging substrate.

CONTROL OF UNDER-FILL USING AN ENCAPSULANT FOR A DUAL-SIDED BALL GRID ARRAY PACKAGE
20180226274 · 2018-08-09 ·

Disclosed herein are methods of fabricating a packaged radio-frequency (RF) device. The disclosed methods use an encapsulant on solder balls to control the distribution of an under-fill material between one or more components and a packaging substrate. The encapsulant can be used in the ball attach process. The fluxing agent leaves behind a material that encapsulates the base of each solder ball. The encapsulant forms an obtuse angle with the substrate surface and with the ball surface. This reduces the tendency of the under-fill material to wick around the solder balls by capillary action which can prevent or limit the capillary under-fill material from flowing onto or contacting other components. Accordingly, the disclosed technologies control under-fill for dual-sided ball grid array packages using an encapsulant on the solder balls.

CONTROL OF UNDER-FILL WITH A PACKAGING SUBSTRATE HAVING AN INTEGRATED TRENCH FOR A DUAL-SIDED BALL GRID ARRAY PACKAGE
20180218922 · 2018-08-02 ·

Described herein are methods of manufacturing dual-sided packaged electronic modules to control the distribution of an under-fill material between one or more components and a packaging substrate. The disclosed technologies include forming a trench in a packaging substrate that is configured to prevent or limit the flow of a capillary under-fill material. This can prevent or limit the capillary under-fill material from flowing onto or contacting other components or elements on the packaging substrate, such as solder balls of a ball-grid array. Accordingly, the disclosed technologies control under-fill for dual-sided ball grid array packages using a trench in a packaging substrate.

Method and apparatus for chip-to-wafer integration

An apparatus and a method for chip-to-wafer integration is provided. The apparatus includes a coating module, a bonding module and a cleaning module. The method includes the steps of placing at least one chip on a wafer to form an integrated product, forming a film on the integrated product, such that the integrated product is substantially fluid-tight, and exerting a predetermined positive pressure on the film during permanent bonding of the at least one chip to the wafer. The method further includes the step of removing the film from the integrated product after permanent bonding of the at least one chip to the wafer.