A method of manufacturing an electronic device is disclosed. An electronic unit is provided. The electronic unit has a chip and at least one bonding pin. The electronic unit is mounted on the substrate through the at least one bonding pin, and an adhesive material is applied to a space between the chip and the substrate.

An integrated circuit packaging method and an integrated packaging circuit, the integrated circuit packaging method including: circuit layers are provided on the top surface of a substrate, the bottom surface of the substrate or the interior of the substrate, the circuit layers having circuit pins; the substrate is provided with connection through holes, and the connection through holes are joined up with the circuit pins; a device is placed on the substrate, and the device is provided with device pins on a surface facing the substrate, which makes the device pins join up with a first opening of the connection through holes; conductive layers are fabricated in the connection through holes by means of a second opening of the connection through holes; and the conductive layers electrically connect the device pins to the circuit pins.

An integrated circuit packaging method and an integrated packaging circuit, the integrated circuit packaging method including: circuit layers are provided on the top surface of a substrate, the bottom surface of the substrate or the interior of the substrate, the circuit layers having circuit pins; the substrate is provided with connection through holes, and the connection through holes are joined up with the circuit pins; a device is placed on the substrate, and the device is provided with device pins on a surface facing the substrate, which makes the device pins join up with a first opening of the connection through holes; conductive layers are fabricated in the connection through holes by means of a second opening of the connection through holes; and the conductive layers electrically connect the device pins to the circuit pins.

The present disclosure provides a semiconductor device, a semiconductor assembly and method of manufacturing the semiconductor assembly. The semiconductor device includes a substrate, a conductive feature in the substrate, an isolation liner between the substrate and the conductive feature, and a main component in the substrate. The conductive feature includes first to third blocks. The first block has a uniform first critical dimension, wherein the main component is disposed around the first block. The second block has a uniform second critical dimension greater than the first critical dimension. The third block is interposed between the first block and the second block and has varying third critical dimensions.

An image sensor includes a first structure including a first substrate, and a first internal wiring structure on the first substrate. The first substrate includes an active pixel region and a through electrode region around the active pixel region. The first internal wiring structure includes a plurality of first internal wiring patterns. The image sensor further includes a second structure including a second substrate and a second internal wiring structure on the second substrate. The second substrate is arranged on the first substrate. The image sensor additionally includes a through electrode layer arranged in the through electrode region to at least partially fill a through electrode trench, which penetrates the first substrate, and to connect the first internal wiring structure to the second internal wiring structure.

A method of forming a semiconductor structure includes following steps. A first wafer is bonded to a second wafer, in which the first wafer includes a first substrate and a first conductive pad above a first surface of the first substrate, and the second wafer comprises a second substrate and a second conductive pad above a second surface of the second substrate. A mask layer is formed above the first substrate. The mask layer and the first substrate are etched to form a first opening in the first substrate. A sacrificial spacer is formed in the first substrate at a sidewall of the first opening. The first conductive pad is etched to form a second opening communicated to the first opening. A conductive material is filled in the first opening and the second opening to form a conductive structure interconnecting the first and second conductive pads.

A method of manufacturing an electronic device includes providing a substrate, providing an electronic unit having a chip and at least one bonding pin is provided, mounting the electronic unit on the substrate through the at least one bonding pin, and applying an adhesive material into a space between the chip and the substrate by a coating process after mounting the electronic unit on the substrate.

A method of manufacturing a light emitting module includes: providing an intermediate structure that includes a wiring board having an upper surface and including a metal layer, a first conducting member on the metal layer, and a second conducting member on the metal layer; disposing, on the intermediate structure, a resist layer having openings; providing a light emitting element including a first electrode and a second electrode, and disposing the light emitting element on the resist layer such that the first electrode and the second electrode respectively face the first conducting member and the second conducting member while a portion of an outer periphery of the lower surface of the light emitting element is exposed from the resist layer in the openings; forming a first bonding member on the first conducting member and forming a second bonding member on the second conducting member; and removing the resist layer.

A semiconductor device includes a silicon carbide layer, a metal carbide layer arranged over the silicon carbide layer, and a solder layer arranged over and in contact with the metal carbide layer.

A method of forming a semiconductor structure includes following steps. A first wafer is bonded to a second wafer, in which the first wafer includes a first substrate and a first conductive pad above a first surface of the first substrate, and the second wafer comprises a second substrate and a second conductive pad above a second surface of the second substrate. A mask layer is formed above the first substrate. The mask layer and the first substrate are etched to form a first opening in the first substrate. A sacrificial spacer is formed in the first substrate at a sidewall of the first opening. The first conductive pad is etched to form a second opening communicated to the first opening. A conductive material is filled in the first opening and the second opening to form a conductive structure interconnecting the first and second conductive pads.