An image sensor chip-scale package includes a pixel array, a cover glass covering the pixel array, a dam, and an adhesive layer. The pixel array is embedded in a substrate top-surface of a semiconductor substrate. The semiconductor substrate includes a plurality of conductive pads in a peripheral region of the semiconductor substrate surrounding the pixel array. The dam at least partially surrounds the pixel array and is located (i) between the cover glass and the semiconductor substrate, and (ii) on a region of the substrate top-surface between the pixel array and the plurality of conductive pads. The adhesive layer is (i) located between the cover glass and the semiconductor substrate, (ii) at least partially surrounding the dam, and (iii) configured to adhere the cover glass to the semiconductor substrate.

A semiconductor package includes a substrate, a first semiconductor chip on the substrate, a second semiconductor chip on the first semiconductor chip and a connection structure. The second semiconductor chip includes a first segment that protrudes outwardly beyond one side of the first semiconductor chip and a second connection pad on a bottom surface of the first segment of the second semiconductor chip. The connection structure includes a first structure between the substrate and the first segment of the second semiconductor chip and a first columnar conductor penetrating the first structure to be in contact with the substrate and being disposed between the second connection pad and the substrate, thereby electrically connecting the second semiconductor chip to the substrate.

A semiconductor package includes a substrate, a first semiconductor chip on the substrate, a second semiconductor chip on the first semiconductor chip and a connection structure. The second semiconductor chip includes a first segment that protrudes outwardly beyond one side of the first semiconductor chip and a second connection pad on a bottom surface of the first segment of the second semiconductor chip. The connection structure includes a first structure between the substrate and the first segment of the second semiconductor chip and a first columnar conductor penetrating the first structure to be in contact with the substrate and being disposed between the second connection pad and the substrate, thereby electrically connecting the second semiconductor chip to the substrate.

A hollow type semiconductor device has a pre-molded substrate (15) in which an element mounting portion, top surfaces of inner leads (2), and a top surface of frame-shaped wiring (7) are exposed on a first surface of a resin sealing body (6), and back surfaces of outer leads (3) and a back surface of a first frame-shaped wall (8) are exposed on a back surface of the resin sealing body (6). A hollow sealing body (14) including a second frame-shaped wall (9) and a sealing plate (4) is provided on the pre-molded substrate (15). The second frame-shaped wall (9) and the sealing plate (4) enclose a hollow portion (13) in which a semiconductor element (1) is kept.

The inventive concept relates to a filling composition for a semiconductor package. The filling composition for a semiconductor package may include a resin, a curing agent, and an insulating filler. The insulating filler may include a first filler body part, a second filler body part, a polymer chain coupled to the first filler body part and the second filler body part, and supramolecules coupled to the polymer chain.

The inventive concept relates to a filling composition for a semiconductor package. The filling composition for a semiconductor package may include a resin, a curing agent, and an insulating filler. The insulating filler may include a first filler body part, a second filler body part, a polymer chain coupled to the first filler body part and the second filler body part, and supramolecules coupled to the polymer chain.

A power converting device such that an overcurrent is interrupted and damage to a power semiconductor element can be prevented is obtained. The power converting device includes a power semiconductor element, a wiring member connected to an electrode of the power semiconductor element, a bus bar that supplies power to the power semiconductor element, and a frame that houses the power semiconductor element, wherein the bus bar has a connection terminal connected to the wiring member, and a fuse portion is provided in the connection terminal.

A power converting device such that an overcurrent is interrupted and damage to a power semiconductor element can be prevented is obtained. The power converting device includes a power semiconductor element, a wiring member connected to an electrode of the power semiconductor element, a bus bar that supplies power to the power semiconductor element, and a frame that houses the power semiconductor element, wherein the bus bar has a connection terminal connected to the wiring member, and a fuse portion is provided in the connection terminal.

A semiconductor device and method of manufacturing is provided, whereby a support structure is utilized to provide additional support for a conductive element in order to eliminate or reduce the formation of a defective surface such that the conductive element may be formed to have a thinner structure without suffering deleterious structures.

A semiconductor device and method of manufacturing is provided, whereby a support structure is utilized to provide additional support for a conductive element in order to eliminate or reduce the formation of a defective surface such that the conductive element may be formed to have a thinner structure without suffering deleterious structures.