A semiconductor device includes a substrate, a package structure, a thermal interface material (TIM) structure, and a lid structure. The package structure is disposed on the substrate. The TIM structure is disposed on the package structure. The TIM structure includes a metallic TIM layer and a non-metallic TIM layer in contact with the metallic TIM layer, and the non-metallic TIM layer surrounds the metallic TIM layer. The lid structure is disposed on the substrate and the TIM structure.

In a semiconductor device, a first wiring member is electrically connected to a first main electrode on a first surface of a semiconductor element, and a second wiring member is electrically connected to a second main electrode on a second surface of the semiconductor element. An encapsulating body encapsulates at least a part of each of the first and second wiring members, the semiconductor element and a bonding wire. The semiconductor element has a protective film on the first surface of the semiconductor substrate, and the pad has an exposed surface exposed from an opening of the protective film. The exposed surface includes a connection area to which the bonding wire is connected, and a peripheral area on a periphery of the connection area. The peripheral area has a surface that defines an angle of 90 degrees or less relative to a surface of the connection area.

An integrated circuit and method of making an integrated circuit is provided. The integrated circuit includes an electrically conductive pad having a generally planar top surface that includes a cavity having a bottom surface and sidewalls extending from the bottom surface of the cavity to the top surface of the pad. An electronic device is attached to the top surface of the electrically conductive pad. A wire bond is attached from the electronic device to the bottom surface of the cavity. A molding compound encapsulates the electronic device.

A package assembly includes a package substrate, a package lid located on the package substrate and including a plate portion, an outer foot extending from the plate portion, and an inner foot having a height greater than or equal to a height of the outer foot, extending from the plate portion and including a first inner foot corner portion located inside a first corner of the outer foot, and an adhesive that adheres the outer foot to the package substrate and adheres the inner foot to the package substrate.

A method of manufacturing a semiconductor package includes depositing a first dielectric layer over a carrier substrate. A first metallization pattern is formed over the first dielectric layer. The first metallization pattern has a first opening exposing the first dielectric layer. A second dielectric layer is deposited over the first metallization pattern, forming a dielectric slot through the first metallization pattern by filling the first opening. A second metallization pattern and a third dielectric layer are formed over the second dielectric layer. A through via is formed over the third dielectric layer, so that the dielectric slot is laterally under the through via.

A semiconductor device in which occurrence of peeling between a filling member and a metal terminal is suppressed is obtained. The semiconductor device includes: an insulating substrate having a front surface and a back surface, and having a semiconductor element joined to the front surface; a base plate joined to the back surface of insulating substrate; a case member surrounding insulating substrate; a filling member having an upper surface, covering insulating substrate, and filling a region surrounded by base plate and case member; and a metal member having a plate shape that leans toward an upper surface side of filling member inside filling member, has one end joined to the front surface of insulating substrate and another end separated from an inner wall of case member, and is exposed from the upper surface of filling member.

A semiconductor device including an element isolation in a trench formed in an upper surface of a semiconductor substrate, a trench isolation including a void in a trench directly under the element isolation, and a Cu wire with Cu ball connected to a pad on the semiconductor substrate, is formed. The semiconductor device has a circular trench isolation arrangement prohibition region that overlaps the end portion of the Cu ball in plan view, and the trench isolation is separated from the trench isolation arrangement prohibition region in plan view.

A semiconductor package including a first lower stack on a substrate and including first lower semiconductor chips, a redistribution substrate on the first lower stack, a redistribution connector electrically connecting the substrate to the redistribution substrate, a first upper stack on the redistribution substrate and including first upper semiconductor chips, a first upper connector electrically connecting the redistribution substrate to the first upper stack, a second upper stack horizontally spaced apart from the first upper stack and including second upper semiconductor chips, and a second upper connector electrically connecting the redistribution substrate to the second upper stack may be provided. The redistribution connector may be on one side of the redistribution substrate. The first upper connector may be on one side of the first upper stack. The second upper connector may be on one side of the second upper stack.

Semiconductor device includes circuit substrate, first semiconductor die, thermal interface material, package lid. First semiconductor die is disposed on and electrically connected to circuit substrate. Thermal interface material is disposed on first semiconductor die at opposite side of first semiconductor die with respect to circuit substrate. Package lid extends over first semiconductor die and is bonded to the circuit substrate. Package lid includes roof, footing, and island. Roof extends along first direction and second direction perpendicular to first direction. Footing is disposed at peripheral edge of roof and protrudes from roof towards circuit substrate along third direction perpendicular to first direction and second direction. Island protrudes from roof towards circuit substrate and contacts thermal interface material on first semiconductor die. Island is disconnected from footing along second direction.

Provided is a semiconductor package having a package housing in an engraved surface form and a method of manufacturing the same, wherein the semiconductor package includes: at least one substrate on which at least one semiconductor chip is installed; at least one terminal lead electrically connected to the substrates; electrical connectors for connecting the semiconductor chips to the substrates or the terminal leads; a package housing covering the semiconductor chips, the electrical connectors, and the at least one substrate; at least one stopper which is formed of a material same as that of the package housing, is higher by a certain height than exposed surfaces of the substrates, is disposed on the exposed surfaces of the substrates, or covers at least a part of the exposed surfaces; and at least one heat sink transmitting heat from the semiconductor chips and radiating heat, wherein the at least a part of the exposed surfaces of the at least one substrate is formed on the upper surface, the lower surface, or the upper and lower surfaces of the package housing and the exposed surfaces of the at least one substrate are joined to the heat sinks by using heat transfer connectors interposed therebetween. Accordingly, the full thickness of the heat transfer connectors may be uniformly maintained.