SEMICONDUCTOR PACKAGE HAVING PACKAGE HOUSING IN ENGRAVED SURFACE FORM AND METHOD OF MANUFACTURING THE SAME

Abstract

Provided is a semiconductor package having a package housing in an engraved surface form and a method of manufacturing the same, wherein the semiconductor package includes: at least one substrate on which at least one semiconductor chip is installed; at least one terminal lead electrically connected to the substrates; electrical connectors for connecting the semiconductor chips to the substrates or the terminal leads; a package housing covering the semiconductor chips, the electrical connectors, and the at least one substrate; at least one stopper which is formed of a material same as that of the package housing, is higher by a certain height than exposed surfaces of the substrates, is disposed on the exposed surfaces of the substrates, or covers at least a part of the exposed surfaces; and at least one heat sink transmitting heat from the semiconductor chips and radiating heat, wherein the at least a part of the exposed surfaces of the at least one substrate is formed on the upper surface, the lower surface, or the upper and lower surfaces of the package housing and the exposed surfaces of the at least one substrate are joined to the heat sinks by using heat transfer connectors interposed therebetween. Accordingly, the full thickness of the heat transfer connectors may be uniformly maintained.

Claims

1. A semiconductor package having a package housing in an engraved surface form comprising: at least one substrate on which at least one semiconductor chip is installed; at least one terminal lead electrically connected to the substrates; electrical connectors for connecting the semiconductor chips to the substrates or the terminal leads; a package housing covering the semiconductor chips, the electrical connectors, and the at least one substrate; at least one stopper which is formed of a material same as that of the package housing, is higher by a certain height than exposed surfaces of the substrates, is disposed on the exposed surfaces of the substrates, or covers at least a part of the exposed surfaces; and at least one heat sink transmitting heat from the semiconductor chips and radiating heat, wherein the at least a part of the exposed surfaces of the at least one substrate is formed on the upper surface, the lower surface, or the upper and lower surfaces of the package housing and the exposed surfaces of the at least one substrate are joined to the heat sinks by using heat transfer connectors interposed therebetween.

2. The semiconductor package of claim 1, wherein the substrates are metal substrates or comprise at least one insulating layer.

3. The semiconductor package of claim 1, wherein the height of the stoppers is 1 μm through 1 mm.

4. The semiconductor package of claim 1, wherein the stoppers are formed to be high in the form of at least any one plane including a circle, a quadrangle, and a polygon.

5. The semiconductor package of claim 1, wherein the at least one stopper is formed by partially engraving the surface of the package housing using a laser.

6. The semiconductor package of claim 1, wherein the height of the at least one stopper is determined by the partial surface of the package housing which is not engraved.

7. The semiconductor package of claim 1, wherein the electrical connectors are conductive spacers in a hexahedral or a cylindrical form.

8. The semiconductor package of claim 7, wherein one side of the spacer is electrically joined to the semiconductor chip on a first substrate using a conductive adhesive and the other side of the spacer is electrically joined to a second substrate using a conductive adhesive.

9. The semiconductor package of claim 1, wherein the electrical connectors are electrically connected between the at least one semiconductor chip and the substrates.

10. The semiconductor package of claim 1, wherein the semiconductor chips are installed on an upper substrate or a lower substrate.

11. The semiconductor package of claim 1, wherein the stoppers comprise at least one spherical grain or at least one round groove on the wall thereof.

12. The semiconductor package of claim 11, wherein the diameter of the grains or the depth of the round grooves is 1 μm through 100 μm.

13. The semiconductor package of claim 1, wherein the heat sink comprises at least one metal layer or at least one ceramic layer on one surface thereof.

14. The semiconductor package of claim 1, wherein the thickness of the heat transfer connector interposed between one surface of the heat sink and the exposed surface of the at least one substrate is 1 μm through 1 mm.

15. The semiconductor package of claim 14, wherein the heat transfer connector has thermal conductivity of 1 W/m-k through 400 W/m-k.

16. The semiconductor package of claim 1, wherein the heat transfer connectors are trapped by 60% or more in the stoppers, the exposed surfaces of the substrates, and the one surfaces of the heat sinks.

17. The semiconductor package of claim 1, wherein the at least one semiconductor chip is structurally connected to one surface of the lower substrate by using an adhesive, the at least one stopper is not formed on the other surface of the lower substrate, the at least one stopper is formed on one surface of the upper substrate, and the other surface of the upper substrate is electrically connected to the semiconductor chips through the electrical connectors.

18. The semiconductor package of claim 1, wherein the at least one semiconductor chip is structurally connected to one surface of the lower substrate by using an adhesive, the at least one stopper is formed on the other surface of the lower substrate, the at least one stopper is formed on one surface of the upper substrate, and the other surface of the upper substrate is electrically connected to the semiconductor chips through the electrical connectors.

19. A semiconductor package having a package housing in an engraved surface form comprising: at least one substrate on which at least one semiconductor chip is installed; at least one terminal lead electrically connected to the substrates; electrical connectors for connecting the semiconductor chips to the substrates or the terminal leads; a package housing covering the semiconductor chips, the electrical connectors, and the at least one substrate; at least one stopper which is formed of a material same as that of the package housing, is higher by a certain height than exposed surfaces of the substrates, and is not overlapped with the exposed surfaces of the substrates; and at least one heat sink transmitting heat from the semiconductor chips and radiating heat, wherein the at least a part of the exposed surfaces of the at least one substrate is formed on the upper surface, the lower surface, or the upper and lower surfaces of the package housing and the exposed surfaces of the at least one substrate are joined to the heat sinks by using heat transfer connectors interposed therebetween.

20. A method of manufacturing a semiconductor package having a package housing in an engraved surface form comprising: preparing a lower substrate and an upper substrate to which at least one semiconductor chip is to be installed, electrical connectors, and at least one terminal lead; structurally connecting the lower substrate, the upper substrate, the semiconductor chips, and the electrical connectors by using conductive adhesives; forming a package housing to cover the semiconductor chips, the electrical connectors, the entire surfaces of the lower and upper substrates being installed, and at least a part of the exposed surfaces of the lower substrate and the upper substrate; partially engraving the surface of the package housing by using a laser to form stoppers to be higher by a certain height than exposed surfaces of the lower substrate or the upper substrate; and joining the exposed surfaces of the at least one substrate to heat sinks by using heat transfer connectors.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

[0033] The above and other features and advantages of the present invention will become more apparent by describing in detail exemplary embodiments thereof with reference to the attached drawings in which:

[0034] FIGS. 1A and 1B are a cross-sectional view of a conventional semiconductor package;

[0035] FIG. 2 is a cross-sectional view of a semiconductor package having a package housing in an engraved surface form according to an embodiment of the present invention;

[0036] FIG. 3 illustrates a structure of a stopper on an upper part of a substrate included in the semiconductor package of FIG. 2 according to an embodiment of the present invention;

[0037] FIG. 4 illustrates a structure of a stoppers on an upper part of a substrate included in the semiconductor package of FIG. 2 according to another embodiment of the present invention;

[0038] FIG. 5 is a cross-sectional view of a semiconductor package to which a heat sink is joined;

[0039] FIGS. 6A and 6B are scanning electron microscope (SEM) photographs of a side of a stopper included in a semiconductor package having a package housing in an engraved surface form according to the present invention; and

[0040] FIGS. 7A, 7B, 7C and 7D illustrate a method of manufacturing a semiconductor package having a package housing in an engraved surface form according to another embodiment of the present invention.

DETAILED DESCRIPTION OF THE INVENTION

[0041] Hereinafter, the embodiments of the present invention will be described in more detail with reference to the accompanying drawings.

[0042] The present invention provides a semiconductor package having a package

[0043] housing in an engraved surface form including a stopper 160 overlapped with an exposed surface A of substrates 121 and 122 included in a package housing 150 according to an embodiment of the present invention, a semiconductor package having a package housing in an engraved surface form including the stopper 160 which is not overlapped with the exposed surface A of the substrates 121 and 122 according to another embodiment of the present invention, and a method of manufacturing a semiconductor package having a package housing in an engraved surface form in which the stopper 160 is formed by being engraved using a laser 10.

[0044] Referring to FIGS. 2 and 3, the semiconductor package having a package housing in an engraved surface form according to an embodiment of the present invention includes one or more substrates 121 and 122 on which at least one semiconductor chip 110 is installed, one or more terminal leads 130 electrically connected to the substrates 121 and 122, electrical connectors for connecting the semiconductor chips 110 to the substrates 121 and 122 or the terminal leads 130, the package housing 150 covering the semiconductor chips 110, the electrical connectors, and one or more substrates 121 and 122, at least one stopper 160 which is formed of a material same as that of the package housing 150, is higher by a certain height than exposed surfaces A of the substrates 121 and 122, is disposed on the exposed surfaces A of the substrates 121 and 122, or covers at least a part of the exposed surfaces A of the substrates 121 and 122, and at least one heat sink 170 transmitting heat from the semiconductor chips 110 and radiating heat. Here, the at least a part of the exposed surfaces A of one or more substrates 121 and 122 is formed on the upper surface, the lower surface, or the upper and lower surfaces of the package housing 150, and the exposed surface A of one or more substrates 121 and 122 is joined to the heat sinks 170 by using heat transfer connectors 171 interposed therebetween. Accordingly, the full thickness of the heat transfer connectors 171 may be uniformly maintained.

[0045] Referring to FIGS. 2 and 4, the semiconductor package having a package housing in an engraved surface form according to another embodiment of the present invention includes one or more substrates 121 and 122 on which at least one semiconductor chip 110 is installed, one or more terminal leads 130 electrically connected to the substrates 121 and 122, electrical connectors for connecting the semiconductor chips 110 to the substrates 121 and 122 or the terminal leads 130, the package housing 150 covering the semiconductor chips 110, the electrical connectors, and one or more substrates 121 and 122, at least one stopper 160 which is formed of a material same as that of the package housing 150, is higher by a certain height than exposed surfaces A of the substrates 121 and 122, and is not overlapped with the exposed surfaces A of the substrates 121 and 122, and at least one heat sink 170 transmitting heat from the semiconductor chips 110 and radiating heat. Here, the at least a part of the exposed surfaces A of one or more substrates 121 and 122 is formed on the upper surface, the lower surface, or the upper and lower surfaces of the package housing 150, and the exposed surfaces A of one or more substrates 121 and 122 are joined to the heat sink 170 by using the heat transfer connectors 171 interposed therebetween. Accordingly, the full thickness of the heat transfer connectors 171 may be uniformly maintained.

[0046] Firstly, one or more substrates are formed to install at least one semiconductor chip 110 thereon.

[0047] The substrates may be metal substrates or include at least one insulating layer formed of ceramic. As illustrated in FIG. 2, the substrate may have a stacked structure including at least one metal layer 121a and 122a, insulating layers 121b and 122b disposed on the metal layers 121a and 122a, and at least one metal layers 121c and 122c having a metal pattern formed on the insulating layers 121b and 122b.

[0048] For example, the substrate may be exposed to one surface or both surfaces of the package housing 150 according to a single sided board or a both sided board, and include the lower substrate 121 on which the semiconductor chip 110 is installed, and the upper substrate 122 spaced apart from the lower substrate 121. Also, the semiconductor chips 110 and the upper substrate 122 may be electrically connected to each other by a surface connection method using a spacer 141 which is an electrical connector, and an adhesive 111 may be filled between the semiconductor chip 110 and the electrical connector.

[0049] In addition, the semiconductor chips 110 may be installed on the lower substrate 121 or the upper substrate 122 and may be a diode, a thyristor, an Insulated Gate Bipolar Transistor (IGBT), or a Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET). In particular, the semiconductor chips 110 may be used in devices used to convert or control electricity such as an inverter, a converter, or an On Board Charger (OBC) and thereby, convert electricity into specific current, specific voltage, or specific frequency.

[0050] Next, one or more terminal leads 130 are included to electrically connect to the lower substrate 121 and/or the upper substrate 122 and are exposed to the outside of the package housing 150 to apply an electrical signal to the semiconductor chips 110.

[0051] Here, the terminal leads 130 may include a metal containing 80 weight % or more of Cu or 60 weight % or more of Al.

[0052] Next, the electrical connectors electrically connect the semiconductor chips 110 to the substrates 121 and 122 or the terminal leads 130, and is formed of any one single metal including Au, Ag, Al, and Cu or an alloy containing 50 weight % or more of any one or more metal including Au, Ag, Al, and Cu.

[0053] For example, as illustrated in FIG. 2, the electrical connectors may be the spacers 141 which is conductive and in a hexahedral or a cylindrical form, and electrically connect the semiconductor chip 110 disposed on the lower substrate 121 or the upper substrate 122 to the upper substrate 122 or the lower substrate 121. Also, the electrical connectors may be metal wires 142 or metal clips electrically connecting the semiconductor chip 110 to the terminal lead 130 so as to enable electrical connection between the at least one semiconductor chip 110 and the substrates 121 and 122.

[0054] Here, one side of the spacer 141 may be electrically joined to the semiconductor chip 110 on a first substrate, that is, the lower substrate 121, using the conductive adhesive 111 and the other side of the spacer 141 may be electrically joined to a second substrate, that is, the upper substrate 122, using a conductive adhesive 123.

[0055] Next, the package housing 150 is an insulator for protecting a semiconductor circuit which covers and protects the semiconductor chips 110, the electrical connectors, and one or more substrates 121 and 122 and may be formed of an Epoxy Molding Compound (EMC). However, instead of an epoxy-based material, the package housing 150 may be formed of a composite material such as PolyPhenylene Sulfide (PPS) or PolyButylene Terephtalate (PBT).

[0056] Next, the at least one stopper 160 is formed of a material same as that of the package housing 150 and is higher by a certain height that the exposed surface A of the substrates 121 and 122. Accordingly, the thickness of the heat transfer connectors 171 used to join the heat sinks 170 may be adjusted and thus, the thickness at both ends of the heat transfer connectors 171 may be uniformly and constantly maintained.

[0057] In this regard, as illustrated in FIGS. 7B and 7C, the laser 10 is used to partially engrave the surface of the package housing 150 while the package housing 150 covers the substrates 121 and 122 by a certain height and then, the at least one stopper 160 may be formed. As mentioned in the embodiment above, the stopper 160 may be overlapped with the exposed surface A of the substrates 121 and 122 or as mentioned in another embodiment above, the stopper 160 may not be overlapped with the exposed surface A of the substrates 121.

[0058] That is, FIG. 3 illustrates a structure of the stoppers 160 on the upper part of the substrate included in the semiconductor package of FIG. 2 according to an embodiment of the present invention and FIG. 4 illustrates a structure of the stoppers 160 on the upper part of the substrate included in the semiconductor package of FIG. 2 according to another embodiment of the present invention.

[0059] More specifically, referring to FIGS. 3 and 5, the stoppers 160 on the upper parts of the substrates 121 and 122 according to an embodiment of the present invention may be disposed on the exposed surfaces A of the substrates 121 and 122 or cover at least a part of the exposed surfaces A. Accordingly, a contact area between the stopper 160 and the heat transfer connector 171 is enlarged so that delamination of the heat transfer connector 171 may be suppressed and adhesive strength to the heat sink 170 may be improved. Also, heat conduction may be constantly accomplished to the heat sink 170 through the heat transfer connector 171 having a uniform thickness.

[0060] Also, referring to FIGS. 4 and 5, the stoppers 160 on the upper parts of the substrates 121 and 122 according to another embodiment of the present invention are not overlapped with the exposed surface A of the substrates 121 and 122. Accordingly, a contact area between the stopper 160 and the heat transfer connector 171 is enlarged so that delamination of the heat transfer connector 171 may be suppressed and adhesive strength to the heat sink 170 may be improved. Also, heat conduction may be constantly accomplished to the heat sink 170 through the heat transfer connector 171 having a uniform thickness.

[0061] The height H of the stoppers 160, as illustrated in FIGS. 3 and 4, may be equally 1 μm through 1 mm and the stoppers 160 may be formed to be high in the form of at least any one plane including a circle, a quadrangle, and a polygon.

[0062] Also, the height H of the at least one stopper 160 may be determined by the partial surface of the package housing 150 which is not engraved by the laser 10. That is, the height H of the stopper 160 may be determined as a height from the exposed surface A of the substrates 121 and 122 to the partial surface of the package housing 150 which is not engraved.

[0063] In addition, as illustrated in FIG. 5, the at least one semiconductor chip 110 may be structurally connected to one surface of the lower substrate 121 by using an adhesive 112, the stoppers 160 may not be formed on the other surface of the lower substrate 121, the at least one stopper 160 may be formed on one surface of the upper substrate 122, and the other surface of the upper substrate 122 may be electrically connected to the semiconductor chips 110 through the spacers 141 which are the electrical connectors.

[0064] As illustrated in FIG. 2, the at least one semiconductor chip 110 may be structurally connected to one surface of the lower substrate 121 by using the adhesive 112, the stoppers 160 may be formed on the other surface of the lower substrate 121, the at least one stopper 160 may be formed on one surface of the upper substrate 122, and the other surface of the upper substrate 122 may be electrically connected to the semiconductor chips 110 through the spacers 141 which are the electrical connectors.

[0065] Referring to FIGS. 6A and 6B, at least one spherical grain 161 or at least one round groove 162 may be formed on the wall of the stopper 160 so as to improve adhesive strength with the heat transfer connector 171 and more preferably, the diameter of the grains 161 or the depth of the round grooves 162 may be 1 μm through 100 μm.

[0066] Next, the at least one heat sink 170 circulates a coolant so that heat generated from the semiconductor chips 110 is transmitted and radiated.

[0067] For example, at least one metal cooling post 173 is arranged in the inner space of the heat sink 170 in the flow direction of the coolant so that heat generated from the semiconductor package may be efficiently radiated by the coolant which directly contacts the metal cooling posts 173.

[0068] Here, as illustrated in FIG. 5, one surface 172 of the heat sink 170 may be at least one metal layer or at least one ceramic layer, and the thickness of the heat transfer connector 171 interposed between one surface 172 of the heat sink 170 and the exposed surface A of the at least one substrate 121 and 122 may correspond to the height H of the stopper 160 which is 1 μm through 1 mm.

[0069] Thermal conductivity of the heat transfer connector 171 may be 1 W/m-k through 400 W/m-k.

[0070] The heat transfer connectors 171 may be filled by 60% or more and trapped in the stoppers 160, the exposed surfaces A of the substrates 121 and 122, and the one surfaces 172 of the heat sinks 170.

[0071] Accordingly, at least a part of the exposed surface A of one or more substrates 121 and 122 is formed on the upper surface, the lower surface, or the upper and lower surfaces of the package housing 150, and the exposed surface A of one or more substrates 121 and 122 is joined to the heat sink 170 by using the heat transfer connector 171 interposed therebetween. Accordingly, the full thickness of the heat transfer connectors 171 may be uniformly maintained by the stoppers 160.

[0072] FIGS. 7A, 7B, 7C and 7D illustrate a method of manufacturing a semiconductor package having a package housing in an engraved surface form according to another embodiment of the present invention. Referring to FIGS. 7A, 7B, 7C and 7D, the method includes (a) preparing the lower substrate 121 and the upper substrate 122 to which the at least one semiconductor chip 110 is to be installed, the electrical connectors 141 and 142, and the at least one terminal lead 130 and structurally connecting the lower substrate 121, the upper substrate 122, the semiconductor chips 110, and the electrical connectors 141 and 142 using the adhesives 111, 112, and 123(FIG. 7A), (b) forming the package housing 150 to cover the semiconductor chips 110, the electrical connectors 141 and 142, the entire surfaces of the lower and upper substrates 121 and 122 being installed, and at least a part of the exposed surfaces A of the lower and upper substrates 121 and 122(FIG. 7B), and (c) partially engraving the surface of the package housing 160 by using the laser 10 to form the stoppers 160 to be higher by a certain height than the exposed surface A of the lower substrate 121 or the upper substrate 122(FIG. 7C).

[0073] Here, the height H of the stoppers 160 may be 1 μm through 1 mm and the thickness of the heat transfer connectors 171 used to join the heat sinks 170 may be adjusted by the stoppers 160. Accordingly, the thickness at both ends of the heat transfer connectors 171 may be uniformly and constantly maintained.

[0074] Referring to FIG. 7D, the at least a part of the exposed surface A of one or more substrates 121 and 122 is formed on the upper surface, the lower surface, or the upper and lower surfaces of the package housing 150, and the exposed surface A of one or more substrates 121 and 122 is joined to the heat sink 170 by using the heat transfer connector 171 interposed therebetween. Accordingly, the full thickness of the heat transfer connector 171 may be uniformly maintained.

[0075] In the semiconductor package having a package housing in an engraved surface form and the method of manufacturing the same as described above, the thickness of the heat transfer connector used to join and transfer heat to the heat sink may be adjusted through the stopper, which is engraved using the laser, and uniformly maintained to suppress delamination and to improve heat transfer efficiency. Also, compared with the conventional stopper structure using the grinding wheel and the method of manufacturing the same, consumption of the sealing member used for molding the package housing may be minimized, cracks of ceramic used to form an insulating layer of the substrate may be prevented, the thickness of the metal layer having the exposed surfaces of the substrate may be minimized, abnormal insulation voltage occurring due to metal particles generated while grinding which remain between the package housing may be blocked, and stress on the semiconductor package may be minimized to prevent delamination.

[0076] According to the present invention, the thickness of the heat transfer connector used to join and transfer heat to the heat sink may be adjusted through the stopper, which is engraved using the laser, and uniformly maintained to suppress delamination and to improve heat transfer efficiency

[0077] Also, compared with the conventional stopper structure using the grinding wheel and the method of manufacturing the same, consumption of the sealing member used for molding the package housing may be minimized, cracks of ceramic used to form an insulating layer of the substrate may be prevented, the thickness of the metal layer having the exposed surfaces of the substrate may be minimized, abnormal insulation voltage occurring due to metal particles generated while grinding which remain between the package housing may be blocked, and stress on the semiconductor package may be minimized to prevent delamination.

[0078] While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the present invention as defined by the following claims.