The invention relates to a circuit arrangement (1) for generating an auxiliary DC voltage (VLV), having:—a half bridge circuit (2) which outputs a load current (IL) and which converts a DC voltage (V1) into an AC voltage, and—wherein the half bridge circuit (2) has, in each of the two branches (A1, A2), at least two switch elements (S1, S2 and S3, S4) arranged in series and—wherein a flying capacitor (3) is connected in parallel to corresponding switch elements (S2, S3) in each of the two branches (A1, A2), characterized by:—an auxiliary voltage generating unit (5) which is supplied with electrical energy by the flying capacitor (3) and which is designed to generate an auxiliary DC voltage (VLV) which is less than or equal to 48 V. The invention also relates to an associated method for generating an auxiliary DC voltage and to a power converter and a vehicle having such a circuit arrangement.

A loss optimization control method for modular multilevel converters (MMCs) under fault-tolerant control is disclosed. The method includes the following steps: when a fault of a SM in a MMC occurs, bypassing the faulty SM to achieve fault-tolerant control; suppressing the fundamental circulating current using a fundamental circulating current controller; respectively calculating the loss of each SM in faulty arms and healthy arms by using loss expressions of different switching tubes in SMs of the MMC; aiming at the loss imbalance between the arms of the MMC, taking the loss of a healthy SM as the reference, adjusting the period of capacitor voltage sorting control in the faulty SMs, achieving the loss control over the working SMs in the faulty SMs, and finally achieving the loss balance of each SM in the faulty arms and the healthy arms. Compared with the conventional methods, the proposed method is easier to implement and does not increase the construction cost of MMCs.

A multilevel power converter is provided. A first cell comprises a first switch and a second switch connectable to a load via a first terminal and connected in series on opposite poles of a DC source. A second cell comprises a third switch and a fourth switch connectable to the load via a second terminal and connected in series on opposite poles of a DC capacitor. An intermediate cell connects the first and second cells and comprises a fifth switch connected to positive poles of the source and the capacitor, a sixth switch connected to negative poles of the source and the capacitor, a seventh switch connected to the positive pole of the source and to the negative pole of the capacitor, and an eighth switch connected to the negative pole of the source and to the positive pole of the capacitor.

The present disclosure is directed to a system and method for modulating a voltage output of a hybrid converter system having first and second set of Si-based power electronic devices coupled to first and second voltage source, respectively, and a first set of SiC-based power electronic devices coupled to the first and second sets of Si-based power electronic devices. The method includes switching between operational states of the hybrid converter system based on a desired voltage output, wherein each operational state includes one of the Si-based power electronic devices from the first and second sets of Si-based power electronic devices and one of the SiC-based devices from the first set of SiC-based power electronic devices being switched on and the remaining power electronic devices being switched off. Each SiC-based power electronic device of the first set of SiC-based power electronic devices switches at a higher frequency as compared to each Si-based power electronic device of the first and second sets of the Si-based power electronic devices.

An operation mode selection unit selects an efficiency priority mode for minimizing the overall loss in a power supply system based on a load request voltage obtained in accordance with the condition of a load and on the conditions of DC power supplies, and generates a mode selection signal in accordance with the selection result. When SOC and/or output power have/has reached power supply restriction values in any DC power supply, an operation mode modification unit generates a final mode selection instructing signal so as to modify selection of the efficiency priority mode by the mode selection signal to select an operation mode in which power distribution between the DC power supplies can be controlled.

An apparatus and method for managing power output of a converter has been provided by present disclosure having an electrical entry power sensor for measuring power drawn by an electrical entry of a household, a power drawn increase prediction module, a power budget controller managing power allocation to restrict a current level output by the power converter so as to prevent power drawn by the electrical entry from exceeding a predefined limit should the greatest probable jump in power drawn occur, a user interface allowing a user to request changes to said current level output by the power converter to charge an electric vehicle, wherein the power budget controller makes suggestions to said user to adjust said power drawn and has the user confirm said changes in order to reallocate said allocation according to said user's adjustments.

Power converters can include a plurality of switching devices and a combination of one or more inductors and one or more flying capacitors. Both boost and buck converters may employ such topologies, and can achieve high efficiency and small size in at least some applications, including those with high conversion ratios. A control circuit can generate a first pair of complementary gate drive signals to drive a first complementary switch pairs and a second pair of complementary gate drive signals to drive a second complementary switch pair. The control circuit can vary a phase shift between the first pair of complementary gate drive signals and the second pair of complementary gate drive signals to regulate the flying capacitor voltage.

A multi-level class D audio power amplifier for supplying an N-level drive signal to a loudspeaker. The multi-level class D audio power amplifier includes a switching matrix having controllable semiconductor switches where the switching matrix include at least (N−2) switch inputs, coupled to respective ones of (N−2) DC input voltage nodes, and at least 2*(N−2) switch outputs coupled to respective ones of 2*(N−2) intermediate nodes of a first output driver. A control circuit is configured to sequentially connect each of the (N−2) DC input voltages to a predetermined set of nodes of the 2*(N−2) intermediate nodes of the first output driver via the switching matrix in accordance with one or more of the 2*(N−1) modulated control signals of the first output driver. N is a positive integer larger than or equal to 3.

A circuit including: a three-level buck converter having: a plurality of input switches and an inductor configured to receive a voltage from the plurality of input switches, the plurality of input switches coupled with a first capacitor and configured to charge and discharge the first capacitor; a second capacitor at an output of the buck converter; and a switched capacitor at an input node of the inductor, wherein the switched capacitor is smaller than either the first capacitor or the second capacitor.

A multi-level inverter having at least two banks, each bank containing a plurality of low voltage MOSFET transistors. A processor configured to switch the plurality of low voltage MOSFET transistors in each bank to switch at multiple times during each cycle.