H03K17/167

INTEGRATED ELECTRONIC DEVICE WITH SOLID-STATE RELAY AND PRE-CHARGE CIRCUIT

An electronic device including an electronic switch M1, an electrical pre-charge circuit and a measurement, command and diagnosis module. The main electronic switch M1 has a first electrical terminal D1, a second electrical terminal S1, and a main driving terminal G1. The main electronic switch M1 is adapted to take, based on a driving signal DRV, depending on the command signal CMD and on an enabling signal ENB, a closed condition or an open condition, wherein the first electrical terminal D1 is respectively connected to or disconnected from the second electrical terminal S1. The pre-charge electrical circuit is adapted to carry out, based on the command signal CMD, a pre-charge operation, aimed at equalizing the electric potentials (V1, V2) of the first and second terminals of the device, before the main electronic switch M1 takes a closed condition, upon of a transition from the open condition.

LOAD DRIVING DEVICE
20180248543 · 2018-08-30 ·

A load driving device includes: a first turn-on drive circuit turning on a first power device as one of a plurality of gate-driven power devices; a second turn-on drive circuit turning on a second power device as another one of the plurality of gate-driven power devices different from the first power device; a current detection circuit detecting a current in at least the first power device; and a control circuit controlling the first turn-on drive circuit to turn on the first power device by applying a gate voltage with a first change rate, and subsequently controlling the second turn-on drive circuit to turn on the second power device by applying a gate voltage with a second change rate, which is larger than the first change rate, based on a condition in which the current detection circuit does not detect an overcurrent in the first power device.

Integrated electronic device with solid-state relay and pre-charge circuit

An electronic device including an electronic switch M1, an electrical pre-charge circuit and a measurement, command and diagnosis module. The main electronic switch M1 has a first electrical terminal D1, a second electrical terminal S1, and a main driving terminal G1. The main electronic switch M1 is adapted to take, based on a driving signal DRV, depending on the command signal CMD and on an enabling signal ENB, a closed condition or an open condition, wherein the first electrical terminal D1 is respectively connected to or disconnected from the second electrical terminal S1. The pre-charge electrical circuit is adapted to carry out, based on the command signal CMD, a pre-charge operation, aimed at equalizing the electric potentials (V1, V2) of the first and second terminals of the device, before the main electronic switch M1 takes a closed condition, upon of a transition from the open condition.

DRIVER FOR A POWER FIELD-EFFECT TRANSISTOR, RELATED SYSTEM AND INTEGRATED CIRCUIT
20180175850 · 2018-06-21 ·

A method of controlling a power field-effect transistor includes controlling a plurality of different phases of a gate-to-source voltage of the power field-effect transistor. Without comparing the gate-to-source voltage of the power field effect transistor to a plurality of reference voltages, the method includes discriminating between the different phases of the gate-to-source voltage based on the plurality of reference voltages. At least one of the plurality of reference voltages is based on a threshold voltage of at least one field-effect transistor.

Inrush control with multiple switches

A novel system is offered for supplying power from an input node to a load coupled to an output node. The system may have multiple switches coupled between the input node and the output node. One or more limiting circuits may be configured for controlling the switches so as to limit outputs of the switches. For example, the limiting circuits may limit current through the respective switches. One or more timers may set a delay period for indicating a fault condition after the limiting is initiated.

VARIABLE RATIO CHARGE PUMP WITH PEAK CURRENT AND AVERAGE CURRENT LIMITING CIRCUITRY

A method of increasing a multiplication ratio of a charge pump, the multiplication ratio defining a relationship between an output voltage of the charge pump and an input voltage of the charge pump, comprising: analyzing a first efficiency of the charge pump when the multiplication ratio is at a first ratio, calculating a second efficiency of the charge pump when the multiplication ratio is a second ratio lesser than the first ratio, and based on the first efficiency and the second efficiency, determining at least one of a target output power and a target output voltage at which to change the multiplication ratio from the second ratio to the first ratio.

Driver for a power field-effect transistor, related system and integrated circuit
09935626 · 2018-04-03 · ·

A driver for a power field-effect transistor includes a first and second circuits that apply respective charge currents to a gate of the power field-effect transistor when a control signal has a first logic value and the voltage between the gate and the source is smaller than a first threshold voltage and greater than a second threshold voltage. Third and fourth circuits apply respective discharge currents to the gate when the control signal has a second logic value and the voltage between the gate and the source is greater than a third threshold voltage and smaller than a fourth threshold voltage. The driver may include at least one field-effect transistor configured to generate at least one of the first, second, third or fourth threshold voltage.

SYSTEM AND METHOD FOR ELIMINATING GATE VOLTAGE OSCILLATION IN PARALLELED POWER SEMICONDUCTOR SWITCHES
20180062634 · 2018-03-01 ·

Methods, systems, and apparatus for eliminating gate voltage oscillation without increasing switching power loss in paralleled power semiconductor switches at high current turn-off. The damping circuit includes a switch for driving voltage and multiple resistors and multiple inductors. The damping circuit includes multiple capacitors connected to the multiple inductors. The damping circuit includes multiple power semiconductor switches that are connected to the multiple inductors at gate terminals. The damping circuit includes multiple gate terminal resistors connected in parallel to the multiple power semiconductor switches at the gate terminals and multiple gate terminal switches connected to the multiple gate terminal resistors.

Circuit to implement a diode function

A circuit including: a plurality of first switches connected in parallel between a first terminal and a second terminal; and a control circuit capable of implementing the following steps at each period of a clock signal: comparing the voltage between the first and second terminals with a reference voltage; if the voltage between the first and second terminals is greater than the reference voltage, turning on one of the first switches without modifying the state of the other switches; and if the voltage between the first and second terminals is smaller than the reference voltage, turning off one of the first switches without modifying the state of the other switches.

System and Method for a Switch Transistor Driver
20180034460 · 2018-02-01 ·

In accordance with an embodiment, a method of driving a switching transistor includes receiving an activation signal for the switching transistor and generating a sequence of random values. Upon receipt of the activation signal, a control node of the switching transistor is driven with a drive strength based on a random value of the sequence of random values.