In a system and method of operating a system that includes a controller and a first bus participant and a successor, the bus participant and successor each has a circuit arrangement arranged between an output and an input, a first resistor is arranged between the output and the supply voltage terminal, a second resistor is arranged between the input and a ground terminal, a third resistor can be arranged between the input and the supply voltage terminal by a first controllable semiconductor switch, and a fourth resistor can be arranged between the output and the supply voltage terminal by a second controllable semiconductor switch.

In a system and method of operating a system that includes a controller and a first bus participant and a successor, the bus participant and successor each has a circuit arrangement arranged between an output and an input, a first resistor is arranged between the output and the supply voltage terminal, a second resistor is arranged between the input and a ground terminal, a third resistor can be arranged between the input and the supply voltage terminal by a first controllable semiconductor switch, and a fourth resistor can be arranged between the output and the supply voltage terminal by a second controllable semiconductor switch.

Provided are a clock signal production circuit, a clock signal production method, and an electronic device, relating to the technical field of communications. In the clock signal production circuit, by digital circuits such as a control word generation circuit, an initial clock generation circuit, and a spread spectrum clock generation circuit, a frequency control word is first generated on the basis of spread spectrum parameters, an initial clock signal of a target duty cycle is then generated on the basis of the frequency control word, and spread spectrum processing is finally performed on the basis of the target duty cycle of the initial clock signal and the frequency control word to obtain a spread spectrum clock signal, i.e., the entire spread spectrum process is executed by the digital circuits. Therefore, it is not necessary to control the electronic device comprising the clock signal production circuit to stop working, i.e., the normal operation of the electronic device is not affected. Moreover, according to the clock signal production circuit, real-time adjustment of spread spectrum parameters (such as spread spectrum depth) that affect a spread spectrum result can be implemented, and the spread spectrum flexibility is relatively high.

Provided are a clock signal production circuit, a clock signal production method, and an electronic device, relating to the technical field of communications. In the clock signal production circuit, by digital circuits such as a control word generation circuit, an initial clock generation circuit, and a spread spectrum clock generation circuit, a frequency control word is first generated on the basis of spread spectrum parameters, an initial clock signal of a target duty cycle is then generated on the basis of the frequency control word, and spread spectrum processing is finally performed on the basis of the target duty cycle of the initial clock signal and the frequency control word to obtain a spread spectrum clock signal, i.e., the entire spread spectrum process is executed by the digital circuits. Therefore, it is not necessary to control the electronic device comprising the clock signal production circuit to stop working, i.e., the normal operation of the electronic device is not affected. Moreover, according to the clock signal production circuit, real-time adjustment of spread spectrum parameters (such as spread spectrum depth) that affect a spread spectrum result can be implemented, and the spread spectrum flexibility is relatively high.

Described is an integrated circuit with a driving amplifier that transmits a signal over a link (e.g. a wire) by raising and lowering a voltage on the link. A reference oscillator provides an error measure for the rate at which the voltage transitions between voltages, the slew rate. Slew-rate calibration circuitry adjusts the driving amplifier responsive to the error measure.

Described is an integrated circuit with a driving amplifier that transmits a signal over a link (e.g. a wire) by raising and lowering a voltage on the link. A reference oscillator provides an error measure for the rate at which the voltage transitions between voltages, the slew rate. Slew-rate calibration circuitry adjusts the driving amplifier responsive to the error measure.

According to one aspect of embodiments, a drive circuit of a normally-ON transistor includes: a normally-OFF transistor that includes a main current path connected in serial to a main current path of the normally-ON transistor; and a buffer circuit that supplies, to a gate of the normally-ON transistor, a control signal for controlling turning ON and OFF of the normally-ON transistor, whose high-voltage side and low-voltage side are biased by a bias voltage supplied from a power source unit.

According to one aspect of embodiments, a drive circuit of a normally-ON transistor includes: a normally-OFF transistor that includes a main current path connected in serial to a main current path of the normally-ON transistor; and a buffer circuit that supplies, to a gate of the normally-ON transistor, a control signal for controlling turning ON and OFF of the normally-ON transistor, whose high-voltage side and low-voltage side are biased by a bias voltage supplied from a power source unit.

The present disclosure provides a comparator and a decision feedback equalization circuit. The comparator includes: a first sampling circuit configured to generate, under the control of a first control signal and a clock signal, first differential signals according to a signal to be compared and a first reference signal; a first positive feedback circuit configured to accelerate a difference between the first differential signals; a second sampling circuit configured to generate, under the control of a second control signal and the clock signal, second differential signals according to the signal to be compared and a second reference signal, where the first reference signal is larger than the second reference signal; a second positive feedback circuit configured to accelerate a difference between the second differential signals.

The present disclosure provides a comparator and a decision feedback equalization circuit. The comparator includes: a first sampling circuit configured to generate, under the control of a first control signal and a clock signal, first differential signals according to a signal to be compared and a first reference signal; a first positive feedback circuit configured to accelerate a difference between the first differential signals; a second sampling circuit configured to generate, under the control of a second control signal and the clock signal, second differential signals according to the signal to be compared and a second reference signal, where the first reference signal is larger than the second reference signal; a second positive feedback circuit configured to accelerate a difference between the second differential signals.