This invention discloses a network data prediction method, a network data processing device, and a network data processing method. The network data processing method is applied to a device that implements an open systems interconnection model (OSI model) and includes the following steps: generating a first data block and a second data block according to the OSI model; processing the first data block based on an error detection method to generate a first check code; encoding the first data block and the first check code to generate a first network data; transmitting the first network data; and receiving a second network data that includes a second check code; generating a target data according to a portion of the second data block and a portion of the second network data; and checking the target data according to the second check code.

An apparatus has processing circuitry to perform data processing in response to instructions; at least one control storage element to store internal state for controlling operation of the processing circuitry; and checksum generating circuitry to generate a checksum based on at least one item of internal state stored in the at least one control storage element. The checksum is stored in a diagnostic storage location from which information is accessible to a diagnostic control agent (e.g. software executing on the processing circuitry and/or an external device). This makes design of software test libraries for detecting hardware faults much more efficient.

In one embodiment, the present invention includes a method for receiving incoming data in a processor and performing a checksum operation on the incoming data in the processor pursuant to a user-level instruction for the checksum operation. For example, a cyclic redundancy checksum may be computed in the processor itself responsive to the user-level instruction. Other embodiments are described and claimed.

Novel and useful system and methods of functional safety mechanisms for use in an artificial neural network (ANN) processor. The mechanisms can be deployed individually or in combination to provide a desired level of safety in neural networks. Multiple strategies are applied involving redundancy by design, redundancy through spatial mapping as well as self-tuning procedures that modify static (weights) and monitor dynamic (activations) behavior. The NN processor incorporates functional safety concepts which reduce its risk of failure that occurs during operation from going unnoticed. The mechanisms function to detect and promptly flag and report the occurrence of an error with some mechanisms capable of correction as well. The safety mechanisms cover data stream fault detection, software defined redundant allocation, cluster interlayer safety, cluster intralayer safety, layer control unit (LCU) instruction addressing, weights storage safety, and neural network intermediate results storage safety.

A method in a first wireless device (WD) supporting wireless communication with a second WD is described. A plurality of wireless packets is received from the second WD including at least a first wireless packet. At least another wireless packet of the plurality of wireless packets is one of a retry packet and a repeat packet of the first packet. Each wireless packet of the plurality of wireless packets includes a plurality of bits and a first group of bits. For each received wireless packet, the plurality of bits corresponding to the received wireless packet is de-spread, and the first group of bits is correlated with a predetermined group of bits. The method further includes performing a majority vote based on the correlation of the first group of bits of each received wireless packet and creating a corrected packet based in part on the majority vote.

In some aspects, methods and apparatus for wireless communications are configured to generate a packet for wireless communication where the packet includes a mark symbol in a preamble of the packet where the mark symbol includes a signature or stamp field in the mark to provide protocol information that indicates the protocol of the packet, such as an 802.11 EHT packet. In some other aspects, a cyclic redundancy check field in the mark symbol may be manipulated in various ways to indicate the protocol of the packet in lieu of providing the signature or stamp field.

A method for determining two bits errors in transmission of 128 bits and the device for realization of this method is provided. By the method and device, the two error bits transferred bits can be determined and corrected by using least bits in operation. Therefore, the amount of data in transmission is increased with a least quantity and thus the transmission quality is not affected.

The current invention relates to an encoder for converting a set of data words into a data block having a header section, a checksum section and a payload section; the encoder comprising: a header inserter arranged to insert a header pattern in the data block; a checksum calculator arranged to calculate a checksum of the set of data words; a data word converter arranged to convert the set of data words into a set of obfuscated data words being a result of applying an exclusive or operation between the set of data words and the checksum.

Input bits are encoded into codewords that include coded bits. Encoding involves applying a first set of polar encoding matrices G.sub.Y of prime number dimension Y to the input bits to produce output bits, and applying a second set of polar encoding matrices G.sub.Z of prime number dimension Z to the output bits to produce the codeword. One or both of G.sub.X and G.sub.Y could be non-2-by-2. Such kernel design and other aspects of code construction, including reliabilities and selection of sub-channels for code construction, non-CRC-aided error correction, and code shortening and puncturing, are discussed in further detail herein.

Some embodiments of the invention provide a forwarding element that can be configured through in-band data-plane messages from a remote controller that is a physically separate machine from the forwarding element. The forwarding element of some embodiments has data plane circuits that include several configurable message-processing stages, several storage queues, and a data-plane configurator. A set of one or more message-processing stages of the data plane are configured (1) to process configuration messages received by the data plane from the remote controller and (2) to store the configuration messages in a set of one or more storage queues. The data-plane configurator receives the configuration messages stored in the set of storage queues and configures one or more of the configurable message-processing stages based on configuration data in the configuration messages.