Patent classifications
H03M13/175
Error trapping in memory structures
Embodiments include methods, systems and circuits for operating an error trapping logic circuit in a memory device. Aspects include receiving, during a first clock cycle, data and check bits for the data from a memory location and determining, during the first clock cycle, whether the data includes any error by calculating an error syndrome from the data and the check bits. Aspects also include determining, during a second clock cycle, a type of the error based on a full decoding of the error syndrome. Aspects further include determining whether to store the data, the check bits and the error syndrome in trap registers of the error trapping logic circuit based on an operating mode of the error trapping logic circuit and the type of the error.
ERROR TRAPPING IN MEMORY STRUCTURES
Embodiments include methods, systems and circuits for operating an error trapping logic circuit in a memory device. Aspects include receiving, during a first clock cycle, data and check bits for the data from a memory location and determining, during the first clock cycle, whether the data includes any error by calculating an error syndrome from the data and the check bits. Aspects also include determining, during a second clock cycle, a type of the error based on a full decoding of the error syndrome. Aspects further include determining whether to store the data, the check bits and the error syndrome in trap registers of the error trapping logic circuit based on an operating mode of the error trapping logic circuit and the type of the error.
Methods, a wireless device, a radio network node for managing a control block
Methods, a wireless device (110) and a radio network node (120) for managing a control block are disclosed. An extended Temporary Flow Identifier, eTFI, is assigned to the wireless device (110) by the radio network node (120). The radio network node (120) constructs the control information. The radio network node (120) performs a bit-wise modulo two addition with a control block and a combination of the eTFI and a pre-determined bit pattern to obtain a modified control block. The radio network node (120) adds channel coding redundancy. The radio network node (120) maps the modified control block onto physical resources. The radio network node (120) sends the modified control block to the wireless device (110). The wireless device (110) decodes the received modified control block removing the channel coding redundancy, performs a bit-wise modulo two addition between the modified control block and a combination of the eTFI and a pre-determined bit pattern to obtain a control block. The wireless device (110) decodes the control block using FIRE-decoding to obtain the control information. The wireless device (110) determines it is the intended recipient of the control information if the TFI information therein matches its assigned TFI. Corresponding computer programs and carriers therefor are also disclosed.
Decoding method, decoding apparatus and decoder
The present discloses provides a decoding method, decoding apparatus and decoder for correcting burst errors. In particular, the decoding method for correcting burst errors comprises: computing an initial syndrome of a received data frame, wherein the data frame is encoded according to cyclic codes for correcting burst errors; determining error correctability of burst error contained in the data frame based on the computed initial syndrome; and processing the burst error in the data frame and outputting the processed data frame based on the determined error correctability. With the decoding method, decoding apparatus, and decoder of the present invention, error correctability of burst errors contained in a data frame can be determined before the data is send out, while having smaller decoding latency through determining the error correctability and error pattern of the burst errors contained in the data frame using initial syndrome of the data frame.
Low-density parity-check apparatus and matrix trapping set breaking method
A low-density parity-check (LDPC) apparatus and a matrix trapping set breaking method are provided. The LDPC apparatus includes a logarithm likelihood ratio (LLR) mapping circuit, a variable node (VN) calculation circuit, an adjustment circuit, a check nodes (CN) calculation circuit and a controller. The LLR mapping circuit converts an original codeword into a LLR vector. The VN calculation circuit calculates original V2C information by using the LLR vector and C2V information. The adjustment circuit adjusts the original V2C information to get adjusted V2C information in accordance with a factor. The CN calculation circuit calculates the C2V information by using the adjusted V2C information, and provides the C2V information to the VN calculation circuit. The controller determines whether to adjust the factor. When LDPC iteration operation falls into matrix trap set, the controller decides to adjust the factor so that the iteration operation breaks away from the matrix trap set.
LOW-DENSITY PARITY-CHECK APPARATUS AND MATRIX TRAPPING SET BREAKING METHOD
A low-density parity-check (LDPC) apparatus and a matrix trapping set breaking method are provided. The LDPC apparatus includes a logarithm likelihood ratio (LLR) mapping circuit, a variable node (VN) calculation circuit, an adjustment circuit, a check nodes (CN) calculation circuit and a controller. The LLR mapping circuit converts an original codeword into a LLR vector. The VN calculation circuit calculates original V2C information by using the LLR vector and C2V information. The adjustment circuit adjusts the original V2C information to get adjusted V2C information in accordance with a factor. The CN calculation circuit calculates the C2V information by using the adjusted V2C information, and provides the C2V information to the VN calculation circuit. The controller determines whether to adjust the factor. When LDPC iteration operation falls into matrix trap set, the controller decides to adjust the factor so that the iteration operation breaks away from the matrix trap set.
METHODS, A WIRELESS DEVICE, A RADIO NETWORK NODE FOR MANAGING A CONTROL BLOCK
Methods, a wireless device (110) and a radio network node (120) for managing a control block are disclosed. An extended Temporary Flow Identifier, eTFI, is assigned to the wireless device (110) by the radio network node (120). The radio network node (120) constructs the control information. The radio network node (120) performs a bit-wise modulo two addition with a control block and a combination of the eTFI and a pre-determined bit pattern to obtain a modified control block. The radio network node (120) adds channel coding redundancy. The radio network node (120) maps the modified control block onto physical resources. The radio network node (120) sends the modified control block to the wireless device (110). The wireless device (110) decodes the received modified control block removing the channel coding redundancy, performs a bit-wise modulo two addition between the modified control block and a combination of the eTFI and a pre-determined bit pattern to obtain a control block. The wireless device (110) decodes the control block using FIRE-decoding to obtain the control information. The wireless device (110) determines it is the intended recipient of the control information if the TFI information therein matches its assigned TFI. Corresponding computer programs and carriers therefor are also disclosed.
Methods, a wireless device, a radio network node for managing a control block
Methods, a wireless device (110) and a radio network node (120) for managing a control block are disclosed. An extended Temporary Flow Identifier, eTFI, is assigned to the wireless device (110) by the radio network node (120). The radio network node (120) constructs the control information. The radio network node (120) performs a bit-wise modulo two addition with a control block and a combination of the eTFI and a pre-determined bit pattern to obtain a modified control block. The radio network node (120) adds channel coding redundancy. The radio network node (120) maps the modified control block onto physical resources. The radio network node (120) sends the modified control block to the wireless device (110). The wireless device (110) decodes the received modified control block removing the channel coding redundancy, performs a bit-wise modulo two addition between the modified control block and a combination of the eTFI and a pre-determined bit pattern to obtain a control block. The wireless device (110) decodes the control block using FIRE-decoding to obtain the control information. The wireless device (110) determines it is the intended recipient of the control information if the TFI information therein matches its assigned TFI. Corresponding computer programs and carriers therefor are also disclosed.
DECODING METHOD, DECODING APPARATUS AND DECODER
The present discloses provides a decoding method, decoding apparatus and decoder for correcting burst errors. In particular, the decoding method for correcting burst errors comprises: computing an initial syndrome of a received data frame, wherein the data frame is encoded according to cyclic codes for correcting burst errors; determining error correctability of burst error contained in the data frame based on the computed initial syndrome; and processing the burst error in the data frame and outputting the processed data frame based on the determined error correctability. With the decoding method, decoding apparatus, and decoder of the present invention, error correctability of burst errors contained in a data frame can be determined before the data is send out, while having smaller decoding latency through determining the error correctability and error pattern of the burst errors contained in the data frame using initial syndrome of the data frame.
Latency reduced error correction scheme with error indication function for burst error correction codes
The present discloses provides a decoding method, decoding apparatus and decoder for correcting burst errors. In particular, the decoding method for correcting burst errors comprises: computing an initial syndrome of a received data frame, wherein the data frame is encoded according to cyclic codes for correcting burst errors; determining error correctability of burst error contained in the data frame based on the computed initial syndrome; and processing the burst error in the data frame and outputting the processed data frame based on the determined error correctability. With the decoding method, decoding apparatus, and decoder of the present invention, error correctability of burst errors contained in a data frame can be determined before the data is send out, while having smaller decoding latency through determining the error correctability and error pattern of the burst errors contained in the data frame using initial syndrome of the data frame.