The present invention discloses a method for growing gallium nitride based on graphene and magnetron sputtered aluminum nitride, and a gallium nitride thin film. The method according to an embodiment comprises: spreading graphene over a substrate; magnetron sputtering an aluminum nitrite onto the graphene-coated substrate to obtain a substrate sputtered with aluminum nitrite; placing the substrate sputtered with aluminum nitride into a MOCVD reaction chamber and heat treating the substrate to obtain a heat treated substrate; growing an aluminum nitride transition layer on the heat treated substrate and a first and a second gallium nitride layer having different V-III ratios, respectively. The gallium nitrate thin film according to an embodiment comprises the following structures in order from bottom to top: a substrate (1), a graphene layer (2), an aluminum nitride nucleation layer (3) fabricated by using a magnetron sputtering method, an aluminum nitride transition layer (4) grown by MOCVD, and a first and a second gallium nitrate layer (5, 6) having different V-III ratios.

A semiconductor substrate includes a first dielectric structure and a die. The first dielectric structure has a first surface and a second surface opposite to the first surface. The die is embedded within the first dielectric structure. The die includes an active surface facing the first surface of the first dielectric structure, a backside surface opposite to the active surface of the die and a metal layer disposed on the backside surface of the die. The metal layer is a recrystallized layer.

A film made of metal or a metal alloy, in particular a film made of aluminum or an aluminum alloy, a so-called NEUTRINO FILM or NTRINO FILM (registered trademarks), to a method of production and to a use of a film made of metal or a metal alloy.

A substrate includes a ceramic core, a first adhesion layer, a barrier layer, and a second adhesion layer. The first adhesion layer encapsulates the ceramic core and includes silicon oxynitride, wherein the atomic number ratio of oxygen to nitrogen in silicon oxynitride of the first adhesion layer has a first ratio. The barrier layer encapsulates the first adhesion layer and includes silicon oxynitride, wherein the atomic number ratio of oxygen to nitrogen in silicon oxynitride of the barrier layer has a second ratio that is different from the first ratio. The second adhesion layer encapsulates the barrier layer and includes silicon oxynitride, wherein the atomic number ratio of oxygen to nitrogen in silicon oxynitride of the second adhesion layer has a third ratio that is different from the second ratio.

A method for forming a semiconductor device includes followings. A metal layer is formed to embedded in a first dielectric layer. An etch stop layer is formed over the metal layer and the first dielectric layer. A second dielectric layer is formed over the etch stop layer. A portion of the second dielectric layer is removed to expose a portion of the etch stop layer and to form a via by a dry etching process. The portion of the etch stop layer exposed by the second dielectric layer is removed to expose the metal layer and to form a damascene cavity by a wet etching process. A damascene structure is formed in the damascene cavity.

A memristor with a two-dimensional (2D) material heterojunction and a preparation method thereof is provided. The memristor includes a substrate, a bottom electrode layer, a 2D material heterojunction layer and a top electrode layer from bottom to top. The 2D material heterojunction layer serves as an intermediate dielectric layer, and has a two-layer laminate structure composed of two different transitional metal dichalcogenides (TMDCs), with one layer in the laminate structure corresponding to one of the TMDCs. The present invention constructs a novel memristor totally based on 2D materials by improving the materials used for key functional layers in the device and the design for the overall structure of the device. Compared with the prior art, the present invention completely different from the conventional metal/insulator/metal (MIM) structure, and has advantages, such as lower operating voltage, excellent retention and switching stability.

A low pressure process for producing thin film crystalline black phosphorus on a substrate and a black phosphorus thin film made by the process. The process includes flowing a phosphorus-containing gas into a deposition chamber and depositing phosphorus from the phosphorus-containing gas onto the substrate in the chamber. The substrate is selected from (i) a gold substrate, a gold-tin alloy substrate, a silver substrate and a copper substrate and (ii) a substrate comprising a thin film of metal selected from gold, tin, silver, copper and alloys of the foregoing metals. The substrate and phosphorus are heated to a temperature ranging from about 350 to less than about 500 C. to form a phosphorus intermediate composition. The substrate and intermediate composition are heated to a temperature of greater than 500 C. to less than about 1000 C. convert the metal phosphorus intermediate composition to the black phosphorus thin film.

The invention relates to a semiconductor structure including a substrate with a first main surface located on a first substrate side and a second main surface located on an opposite second substrate side as well as a vertical via extending completely through the substrate between the first main surface and the second main surface. On the first substrate side, a metallization layer that is connected galvanically to the via is arranged in the region of the via. A compound semiconductor layer connected galvanically to the metallization layer is arranged on the metallization layer. Further, the invention relates to a method for producing such a semiconductor device structure.

A method of manufacturing an oxide semiconductor, includes impregnating a substrate in a solution containing a metal precursor and hydroxyl ions, and forming a metal oxide on the substrate by applying a voltage to the solution. The solution includes a surfactant, and the direction of crystal growth of the metal oxide is controllable based on the surfactant.

In order to enable simple removal of a substrate used for manufacturing a semiconductor element, a manufacturing method includes forming a graphene layer on a substrate portion formed of a semiconductor, forming an element portion on the graphene layer, the element portion including a semiconductor layer directly formed on the graphene layer, which takes over crystal information relating to the substrate portion when the semiconductor layer is formed on the substrate portion without intermediation of the graphene layer, and performing cutting-off between the substrate portion and the element portion at the graphene layer.