H01L21/02491

SUBSTRATE FOR SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE USING THE SAME

The present invention provides a substrate for a semiconductor device and a semiconductor device using the same. The substrate for a semiconductor device comprises a ceramic supporting base plate formed by a polycrystalline aluminum nitride (AlN) sintered body; at least one silicon oxide layer formed on the base plate by a sol-gel method wherein the at least one silicon oxide layer has an average roughness less than the base plate to block polycrystalline orientation of the base plate and has a total thickness in a range of 10˜5000 nm, the silicon oxide layer is only formed from the sol-gel method and are not single crystalline; a first buffer layer comprising aluminum nitride (AlN) on the at least one silicon oxide layer with a thickness of 0.1˜10 μm; and a gallium nitride layer formed on the first buffer layer and having a single-crystal crystalline structure.

CVD BASED OXIDE-METAL MULTI STRUCTURE FOR 3D NAND MEMORY DEVICES

Implementations described herein generally relate to a method for forming a metal layer and to a method for forming an oxide layer on the metal layer. In one implementation, the metal layer is formed on a seed layer, and the seed layer helps the metal in the metal layer nucleate with small grain size without affecting the conductivity of the metal layer. The metal layer may be formed using plasma enhanced chemical vapor deposition (PECVD) and nitrogen gas may be flowed into the processing chamber along with the precursor gases. In another implementation, a barrier layer is formed on the metal layer in order to prevent the metal layer from being oxidized during subsequent oxide layer deposition process. In another implementation, the metal layer is treated prior to the deposition of the oxide layer in order to prevent the metal layer from being oxidized.

Rare Earth Pnictides for Strain Management
20170353002 · 2017-12-07 ·

Systems and methods described herein may include a first semiconductor layer with a first lattice constant, a rare earth pnictide buffer epitaxially grown over the first semiconductor, wherein a first region of the rare earth pnictide buffer adjacent to the first semiconductor has a net strain that is less than 1%, a second semiconductor layer epitaxially grown over the rare earth pnictide buffer, wherein a second region of the rare earth pnictide buffer adjacent to the second semiconductor has a net strain that is a desired strain, and wherein the rare earth pnictide buffer may comprise one or more rare earth elements and one or more Group V elements. In some examples, the desired strain is approximately zero.

Composition And Method For Making Picocrystalline Artificial Borane Atoms
20230188213 · 2023-06-15 · ·

Materials containing picocrystalline quantum dots that form artificial atoms are disclosed. The picocrystalline quantum dots (in the form of born icosahedra with a nearly-symmetrical nuclear configuration) can replace corner silicon atoms in a structure that demonstrates both short range and long-range order as determined by x-ray diffraction of actual samples. A novel class of boron-rich compositions that self-assemble from boron, silicon, hydrogen and, optionally, oxygen is also disclosed. The preferred stoichiometric range for the compositions is (B.sub.12H.sub.w).sub.xSi.sub.yO.sub.z with 3≤w≤5, 2≤x≤4, 2≤y≤5 and 0≤z≤3. By varying oxygen content and the presence or absence of a significant impurity such as gold, unique electrical devices can be constructed that improve upon and are compatible with current semiconductor technology.

Low temperature graphene growth

Exemplary methods of semiconductor processing may include delivering a carbon-containing precursor and a hydrogen-containing precursor to a processing region of a semiconductor processing chamber. The methods may include generating a plasma of the carbon-containing precursor and the hydrogen-containing precursor within the processing region of the semiconductor processing chamber. The methods may include forming a layer of graphene on a substrate positioned within the processing region of the semiconductor processing chamber. The substrate may be maintained at a temperature below or about 600° C. The methods may include halting flow of the carbon-containing precursor while maintaining the plasma with the hydrogen-containing precursor.

ELECTRONIC DEVICE WITH A WIRE ELEMENT EXTENDING FROM AN ELECTROCONDUCTIVE LAYER COMPRISING ZIRCONIUM CARBIDE OR HAFNIUM CARBIDE

The electronic device comprises a substrate (1), at least one semiconductor wire element (2) formed by a nitride of a group III material and an electroconductive layer (3) interposed between the substrate (1) and said at least one semiconductor wire element (2). Said at least one semiconductor wire element (2) extends from said electroconductive layer (3), and the electroconductive layer (3) comprises a carbide of zirconium or a carbide of hafnium.

METHOD FOR PRODUCING A LAYER SYSTEM FOR THIN-FILM SOLAR CELLS HAVING A SODIUM INDIUM SULFIDE BUFFER LAYER

A method for producing a layer system for thin-film solar cells is described, wherein a) an absorber layer is produced, and b) a buffer layer is produced on the absorber layer, wherein the buffer layer contains sodium indium sulfide according to the formula Na.sub.xIn.sub.y-x/3S with 0.063≦x≦0.625 and 0.681≦y≦1.50, and wherein the buffer layer is produced, without deposition of indium sulfide, based on at least one sodium thioindate compound.

Laser irradiation apparatus and method for manufacturing semiconductor device

A laser irradiation apparatus (1) according to an embodiment includes an optical-system module (20) configured to apply laser light (L1) to an object to be irradiated, a shield plate (51) in which a slit (54) is formed, through which the laser light (L1) passes, and a reflected-light receiving component (61) disposed between the optical-system module (20) and the shield plate (51), in which the reflected-light receiving component (61) is able to receive, out of the laser light (L1), reflected light (R1) reflected by the shield plate (51).

ENGINEERED SUBSTRATE STRUCTURES FOR POWER AND RF APPLICATIONS
20230178367 · 2023-06-08 · ·

A substrate includes a support structure comprising a polycrystalline ceramic core, a first adhesion layer encapsulating the polycrystalline ceramic core, a barrier layer encapsulating the first adhesion layer, a second adhesion layer coupled to the barrier layer, and a conductive layer coupled to the second adhesion layer. The substrate also includes a bonding layer coupled to the support structure, a substantially single crystal silicon layer coupled to the bonding layer, and an epitaxial semiconductor layer coupled to the substantially single crystal silicon layer.

Thin film transistor and manufacturing method thereof, array substrate, display device and sensor

Provided is a thin film transistor including a highly-textured dielectric layer, an active layer, a gate electrode and a source/drain electrode that are stacked on a base substrate. The source/drain electrode includes a source electrode and a drain electrode. The gate electrode and the active layer are insulated from each other. The source electrode and the drain electrode are electrically connected to the active layer. Constituent particles of the active layer are of monocrystalline silicon-like structures. According to the present disclosure, the highly-textured dielectric layer is adopted to replace an original buffer layer to induce the active layer to grow into a monocrystalline silicon-like structure, such that the performance of the thin film transistor is improved.