Various embodiments of the present application are directed to an IC, and associated forming methods. In some embodiments, the IC comprises a memory region and a logic region integrated in a substrate. A memory cell structure is disposed on the memory region. A logic device is disposed on the logic region having a logic gate electrode separated from the substrate by a logic gate dielectric. A sidewall spacer is disposed along a sidewall surface of the logic gate electrode. A contact etch stop layer (CESL) is disposed along an upper surface of the substrate, extending upwardly along and in direct contact with sidewall surfaces of the pair of select gate electrodes within the memory region, and extending upwardly along the sidewall spacer within the logic region.

A silicon-containing composition includes: a first polysiloxane; a second polysiloxane different from the first polysiloxane; and a solvent. The first polysiloxane includes a group which includes at least one selected from the group consisting of an ester bond, a carbonate structure, and a cyano group. The second polysiloxane includes a substituted or unsubstituted hydrocarbon group having 1 to 20 carbon atoms.

A composition for forming a resist underlayer film includes: (A) a crosslinkable compound represented by formula (I) and (D) a solvent. [In the formula, n is an integer of 2-6, the n-number of Z each independently are monovalent organic groups including a mono-, di-, tri-, tetra-, penta-, or hexaformylaryl group, the n-number of A each independently represent —OCH.sub.2CH(OH)CH.sub.2O— or (BB), and T is an n-valent hydrocarbon group and/or repeating unit of a polymer optionally having at least one group selected from the group made of a hydroxy group, an epoxy group, an acyl group, an acetyl group, a benzoyl group, a carboxy group, a carbonyl group, an amino group, an imino group, a cyano group, an azo group, an azide group, a thiol group, a sulfo group, and an allyl group and optionally interrupted by a carbonyl group and/or an oxygen atom.]

A photolithography method includes dispensing a first liquid toward a target layer through a nozzle at a first distance from the target layer; moving the nozzle such that the nozzle is at a second distance from the target layer, wherein the second distance is different from the first distance; dispensing a second liquid toward the target layer through the nozzle at the second distance from the target layer; and patterning the target layer after dispensing the first liquid and the second liquid.

Gate-all-around integrated circuit structures having embedded GeSnB source or drain structures, and methods of fabricating gate-all-around integrated circuit structures having embedded GeSnB source or drain structures, are described. For example, an integrated circuit structure includes a vertical arrangement of horizontal nanowires above a fin, the fin including a defect modification layer on a first semiconductor layer, and a second semiconductor layer on the defect modification layer. A gate stack is around the vertical arrangement of horizontal nanowires. A first epitaxial source or drain structure is at a first end of the vertical arrangement of horizontal nanowires, and a second epitaxial source or drain structure is at a second end of the vertical arrangement of horizontal nanowires.

The disclosure provides a method of fabricating a semiconductor device, where the method includes the following operations. A semiconductor stack including a silicon-containing layer, an oxide deposited on a portion of the silicon-containing layer, an underlayer, and a resist layer is formed. The resist layer is patterned to form a first opening in the resist layer. The underlayer is etched to extend the first opening into the underlayer, where a top surface of the oxide is exposed by the first opening. The oxide and the underlayer are etched with a first etchant, where a ratio of etching rates of the oxide and the underlayer is about 1:1. The oxide and the silicon-containing layer are etched with a second etchant to form a second opening below the first opening, where an etching rate of the oxide is higher than that of the silicon-containing layer.

A butted contact structure is provided. In one embodiment, a structure includes a first transistor on a substrate, the first transistor comprising a first source or drain region, a first gate, and a first gate spacer being disposed between the first gate and the first source or drain region. The structure includes a second transistor on the substrate, the second transistor comprising a second source or drain region, a second gate, and a second gate spacer being disposed between the second gate and the second source or drain region. The structure includes a butted contact disposed above and extending from the first source or drain region to at least one of the first or second gate, a portion of the first gate spacer extending a distance into the butted contact to separate a first bottom surface of the butted contact from a second bottom surface of the butted contact.

A resist underlayer film forming composition contains a resin containing a unit structure represented by formula (1): [in formula (1), R1 represents a thiadiazole group which is optionally substituted with a C1-6 alkyl group optionally interrupted by a carboxy group, a C1-6 alkyl group optionally substituted with a hydroxyl group, or a C1-4 alkylthio group, and R2 represents a hydrogen atom or formula (2): (in formula (2), R1 is the same as defined above, and * represents a binding moiety)]. The resist underlayer film forming composition provides a resist underlayer film which has excellent solvent resistance, excellent optical parameters, an excellent dry etching rate, and excellent embeddability.

A composition for forming an organic film contains a polymer having a partial structure shown by the following general formula (1) as a repeating unit, and an organic solvent. Each of AR1 and AR2 represents a benzene ring or naphthalene ring which optionally have a substituent; W.sub.1 represents a particular partial structure having a triple bond, and the polymer optionally contains two or more kinds of W.sub.1; and W.sub.2 represents a divalent organic group having 6 to 80 carbon atoms and at least one aromatic ring. This invention provides: a polymer curable even under film formation conditions in an inert gas and capable of forming an organic film which has not only excellent heat resistance and properties of filling and planarizing a pattern formed in a substrate, but also favorable film formability onto a substrate with less sublimation product; and a composition for forming an organic film, containing the polymer. ##STR00001##

A method of forming vias and skip vias is provided. The method includes forming a blocking layer on an underlying layer, and forming an overlying layer on the blocking layer. The method further includes opening a hole in the overlying layer that overlaps the blocking layer, and etching past the blocking layer into the underlying layer to form a second hole that is smaller than the hole in the overlying layer.