The present invention relates to a heat dissipation substrate, which is a composite substrate composed of two layers, and which is characterized in that a surface layer (first layer) (1) is configured of single crystal silicon and a handle substrate (second layer) (2) is configured of a material that has a higher thermal conductivity than the first layer. A heat dissipation substrate of the present invention has high heat dissipation properties.

According to an embodiment, a sensor package includes an electrically insulating substrate including a cavity in the electrically insulating substrate, an ambient sensor, an integrated circuit die embedded in the electrically insulating substrate, and a plurality of conductive interconnect structures coupling the ambient sensor to the integrated circuit die. The ambient sensor is supported by the electrically insulating substrate and arranged adjacent the cavity.

A method and a device for bonding a first substrate with a second substrate at mutually facing contact faces of the substrates.

When III-V semiconductor material is bonded to an oxide material, water molecules can degrade the bonding if they become trapped at the interface between the III-V material and the oxide material. Because water molecules can diffuse readily through oxide material, and may not diffuse as readily through III-V material or through silicon, forcing the III-V material against the oxide material can force water molecules at the interface into the oxide material and away from the interface. Water molecules present at the interface can be forced during manufacturing through vertical channels in a silicon layer into a buried oxide layer thereby to enhance bonding between the III-V material and the oxide material. Water molecules can be also forced through lateral channels in the oxide material, past a periphery of the III-V material, and, through diffusion, out of the oxide material into the atmosphere.

A method for surface treatment of an at least primarily crystalline substrate surface of a substrate such that by amorphization of the substrate surface, an amorphous layer is formed at the substrate surface with a thickness d>0 nm of the amorphous layer. This invention also relates to a corresponding device for surface treatment of substrates.

A bonding apparatus includes a first holder, a second holder, an imaging unit and a moving device. The first holder is configured to hold a first substrate. The second holder is disposed to face the first holder and configured to hold a second substrate to be bonded to the first substrate. The imaging unit includes a first imaging device configured to image a first alignment mark formed on a surface of the first substrate facing the second substrate and a second imaging device configured to image a second alignment mark formed on a surface of the second substrate facing the first substrate. The moving device is configured to move the imaging unit in a first direction and a second direction intersecting with the first direction within a plan region between the first holder and the second holder.

A wafer bonding apparatus includes a first bonding chuck to fix a first wafer on a first surface thereof, a second bonding chuck to fix a second wafer on a second surface thereof facing the first surface, a bonding initiation member at a center of the first bonding chuck to push the first wafer towards the second surface, and a membrane member including a protrusion protruding from a center portion of the second surface towards the first surface, and a planar portion defining the protrusion on an outer region surrounding the center portion.

A method of manufacturing a 3DIC structure includes the following processes. A die is bonded to a wafer. A first dielectric layer is formed on the wafer and laterally aside the die. A second dielectric material layer is formed on the die and the first dielectric layer. A portion of the second dielectric material layer over a non-edge region of the wafer is selectively removed to form a protruding portion over an edge region of the wafer. The second dielectric material layer is planarized to form a second dielectric layer on the first dielectric layer and the die. A bonding film is formed on the second dielectric layer. A carrier is bonded to the wafer through the bonding film.

Techniques for joining dissimilar materials in microelectronics are provided. Example techniques direct-bond dissimilar materials at an ambient room temperature, using a thin oxide, carbide, nitride, carbonitride, or oxynitride intermediary with a thickness between 100-1000 nanometers. The intermediary may comprise silicon. The dissimilar materials may have significantly different coefficients of thermal expansion (CTEs) and/or significantly different crystal-lattice unit cell geometries or dimensions, conventionally resulting in too much strain to make direct-bonding feasible. A curing period at ambient room temperature after the direct bonding of dissimilar materials allows direct bonds to strengthen by over 200%. A relatively low temperature anneal applied slowly at a rate of 1 C. temperature increase per minute, or less, further strengthens and consolidates the direct bonds. The example techniques can direct-bond lithium tantalate LiTaO.sub.3 to various conventional substrates in a process for making various novel optical and acoustic devices.

A GaN on diamond wafer and method for manufacturing the same is provided. The method comprising: disposing a GaN device or wafer on a substrate, having a nucleation layer disposed between the substrate and a GaN layer; affixing the device to a handling wafer; removing the substrate and substantially all the nucleation layer; and bonding the GaN layer to a diamond substrate.