Patent classifications
H01L21/2633
Method for Extreme Ultraviolet Lithography Mask Treatment
A reflective mask includes a reflective multilayer over a substrate, a capping layer over the reflective multilayer, an absorber layer over the capping layer and including a top surface, and a protection layer directly on the top surface of the absorber layer. The absorber layer is formed of a first material and the protection layer is formed of a second material that is less easily to be oxidized than the first material.
Pattern decomposition lithography techniques
Techniques are disclosed for realizing a two-dimensional target lithography feature/pattern by decomposing (splitting) it into multiple unidirectional target features that, when aggregated, substantially (e.g., fully) represent the original target feature without leaving an unrepresented remainder (e.g., a whole-number quantity of unidirectional target features). The unidirectional target features may be arbitrarily grouped such that, within a grouping, all unidirectional target features share a common target width value. Where multiple such groupings are provided, individual groupings may or may not have the same common target width value. In some cases, a series of reticles is provided, each reticle having a mask pattern correlating to a grouping of unidirectional target features. Exposure of a photoresist material via the aggregated series of reticles substantially (e.g., fully) produces the original target feature/pattern. The pattern decomposition techniques may be integrated into any number of patterning processes, such as litho-freeze-litho-etch and litho-etch-litho-etch patterning processes.
CONTROLLED HARDMASK SHAPING TO CREATE TAPERED SLANTED FINS
Embodiments described herein relate to methods forming optical device structures. One embodiment of the method includes exposing a substrate to ions at an ion angle relative to a surface normal of a surface of the substrate to form an initial depth of a plurality of depths. A patterned mask is disposed over the substrate and includes two or more projections defining exposed portions of the substrate or a device layer disposed on the substrate. Each projection has a trailing edge at a bottom surface contacting the device layer, a leading edge at a top surface of each projection, and a height from the top surface to the device layer. Exposing the substrate to ions at the ion angle is repeated to form at least one subsequent depth of the plurality of depths.
Metal line structure and method
A method comprises forming a first conductive line and a second conductive line in a first dielectric layer over a substrate, each having a planar top surface, applying an etch-back process to the first dielectric layer until a dielectric portion between the first conductive line and the second conductive line has been removed, and the first conductive line and the second conductive line have respective cross sectional shapes including a rounded surface and two rounded corners and depositing a second dielectric layer over the substrate, while leaving a first air gap between the first conductive line and the second conductive line.
Etching platinum-containing thin film using protective cap layer
A microelectronic device is formed by forming a platinum-containing layer on a substrate of the microelectronic device. A cap layer is formed on the platinum-containing layer so that an interface between the cap layer and the platinum-containing layer is free of platinum oxide. The cap layer is etchable in an etch solution which also etches the platinum-containing layer. The cap layer may be formed on the platinum-containing layer before platinum oxide forms on the platinum-containing layer. Alternatively, platinum oxide on the platinum-containing layer may be removed before forming the cap layer. The platinum-containing layer may be used to form platinum silicide. The platinum-containing layer may be patterned by forming a hard mask or masking platinum oxide on a portion of the top surface of the platinum-containing layer to block the wet etchant.
Die singulation and stacked device structures
Techniques for singulating dies from a respective workpiece and for incorporating one or more singulated die into a stacked device structure are described herein. In some examples, singulating a die from a workpiece includes chemically etching the workpiece in a scribe line. In some examples, singulating a die from a workpiece includes mechanically dicing the workpiece in a scribe line and forming a liner along a sidewall of the die. The die can be incorporated into a stacked device structure. The die can be attached to a substrate along with another die that is attached to the substrate. An encapsulant can be between each die and the substrate and laterally between the dies.
Method and apparatus to eliminate contaminant particles from an accelerated neutral atom beam and thereby protect a beam target
An improved ANAB system or process substantially or fully eliminating contaminant particles from reaching a beam target by adding to the usual primary (first) ionizer of the ANAB system or process an additional (second) ionizer to ionize contaminant particles and means to block or retard the ionized particles to prevent their reaching the beam target.
Apparatus with doped surfaces, and related methods with in situ doping
Apparatus, such as electronic devices and structures thereof, include at least one doped surface of a base (e.g., semiconductor) material. A dopant of the at least one doped surface is concentrated along the surface, defining a thickness, on or in the base material, not exceeding about one atomic layer. Methods for forming the doped surfaces involve gas-phase doping exposed surfaces of the base material in situ, within a same material-removal tool used to form at least one opening defined at least partially by the base material and into which the dopant is to be introduced.
Method for extreme ultraviolet lithography mask treatment
A method comprises receiving a workpiece that includes a substrate having a low temperature expansion material, a reflective multilayer over the substrate, a capping layer over the reflective multilayer, and an absorber layer over the capping layer. The method further comprises patterning the absorber layer to provide first trenches corresponding to circuit patterns on a wafer, and patterning the absorber layer, the capping layer, and the reflective multilayer to provide second trenches corresponding to a die boundary area on the wafer, thereby providing an extreme ultraviolet lithography (EUVL) mask. The method further comprises treating the EUVL mask with a treatment chemical that prevents exposed surfaces of the absorber layer from oxidation.
Phosphorus fugitive emission control
A method of processing and passivating an implanted workpiece is disclosed, wherein, after passivation, the fugitive emissions of the workpiece are reduced to acceptably low levels. This may be especially beneficial when phosphorus, arsine, germane or another toxic species is the dopant being implanted into the workpiece. In one embodiment, a sputtering process is performed after the implantation process. This sputtering process is used to sputter the dopant at the surface of the workpiece, effectively lowering the dopant concentration at the top surface of the workpiece. In another embodiment, a chemical etching process is performed to lower the dopant concentration at the top surface. After this sputtering or chemical etching process, a traditional passivation process can be performed.