Patent classifications
H01L21/2636
SUBSTRATE TREATING APPARATUS AND LIQUID SUPPLYING METHOD
The inventive concept provides a substrate treating apparatus. In an embodiment, the substrate treating apparatus includes a housing having a treatment space for treating a substrate in an interior thereof, a support unit that supports the substrate in the treatment space, a nozzle that supplies a liquid to the substrate positioned on the support unit, a liquid supply unit that supplies the liquid to the nozzle, and a controller that controls the liquid unit, the liquid supply unit includes a tank having an interior space for storing the liquid, and a first circulation line that circulates the liquid stored in the interior space and in which a first heater is installed, and the controller controls the first heater such that the first heater heats the liquid to a first temperature, at which particles in the interior of the liquid are not eluted.
Semiconductor device with field stop layer and semiconductor device manufacturing method thereof
First and second n-type field stop layers in an n.sup.− drift region come into contact with a p.sup.+ collector layer. The first n-type field stop layer has an impurity concentration reduced toward an n.sup.+ emitter region at a steep gradient. The second n-type field stop layer has an impurity concentration distribution in which impurity concentration is reduced toward the n.sup.+ emitter region at a gentler gradient than that in the first n-type field stop layer and the impurity concentration of a peak position is less than that in the impurity concentration distribution of the first n-type field stop layer. The impurity concentration distributions of the first and second n-type field stop layers have the same peak position. The first and second n-type field stop layers are formed using annealing and first and second proton irradiation processes which have the same projected range and different acceleration energy levels.
Short-wave infrared detector array and fabrication methods thereof
Disclosed are methods of fabricating short-wave infrared detector arrays including readout and absorption wafers connected by a recrystallized a-Si layer. The absorber wafer includes a SWIR conversion layer with a Ge.sub.1-xSn.sub.x alloy composition. Process steps realize the readout wafer and a portion of the absorption wafer, including bonding the readout wafer and a first portion of the absorption wafer. The a-Si intermediate layer linking the readout wafer and the first portion of the absorption wafer the a-Si intermediate layer is recrystallized by applying heat by a light source. The method assures a temperature profile between the light entrance surface and the CMOS electronic layer of the readout wafer maintaining readout layer temperature <350° C. during recrystallization. After the recrystallization process step the absorption wafer is completed by depositing the SWIR conversion layer. Also disclosed is a SWIR detector array realized by the method and SWIR detector array applications.
Semiconductor substrate crack mitigation systems and related methods
Implementations of a method for healing a crack in a semiconductor substrate may include identifying a crack in a semiconductor substrate and heating an area of the semiconductor substrate including the crack until the crack is healed.
Apparatus with doped surfaces, and related methods with in situ doping
Apparatus, such as electronic devices and structures thereof, include at least one doped surface of a base (e.g., semiconductor) material. A dopant of the at least one doped surface is concentrated along the surface, defining a thickness, on or in the base material, not exceeding about one atomic layer. Methods for forming the doped surfaces involve gas-phase doping exposed surfaces of the base material in situ, within a same material-removal tool used to form at least one opening defined at least partially by the base material and into which the dopant is to be introduced.
Heat treatment apparatus and heat treatment method
A heat treatment apparatus includes a heating unit provided around a processing container accommodating a substrate; a plurality of blowing units configured to blow a cooling medium into a space between the processing container and the heating unit; and a shutter configured to simultaneously opens/closes at least two of the plurality of blowing units and including a slit formed corresponding to each of the blowing units.
PROCESS APPARATUS INCLUDING A NON-CONTACT THERMO-SENSOR
A process apparatus includes a heating module and a supporter disposed below the heating module. A process space is provided between the heating module and the supporter. The heating module includes a housing, at least one heating lamp disposed in the housing, at least one temperature sensor disposed in the housing, and a blocking plate disposed under the housing. The blocking plate spatially separates the at least one heating lamp from the process space, and the blocking plate includes at least one window spatially connecting the at least one temperature sensor to the process space.
TREATING A SILICON ON INSULATOR WAFER IN PREPARATION FOR MANUFACTURING AN ATOMISTIC ELECTRONIC DEVICE INTERFACED WITH A CMOS ELECTRONIC DEVICE
A method for treating a wafer is provided with a portion of a semiconductor layer is selectively removed from the wafer so as to create an inactive region of the wafer surrounding a first active region of the wafer. The inactive region of the wafer has an exposed portion of an insulator layer, but none of the semiconductor layer. The first active region of the wafer includes a first portion of the semiconductor layer and a first portion of the insulator layer. At least one conductor is formed in contact with the first portion of the semiconductor layer, such that the conductor and the first portion of the semiconductor layer form a portion of an electrical circuit. The first active region of the wafer is selectively treated to remove a native oxide layer from the first portion of the semiconductor layer. A resulting wafer is also disclosed.
Methods for fabricating artificial neural networks (ANN) based on doped semiconductor resistive random access memory (RRAM) elements
A method of forming a resistive random access memory (RRAM) element, the method includes forming a Silicon layer on an oxide layer, depositing a thin film dopant layer on the Silicon layer, and controlling a concentration of the dopant in the thin film dopant layer.
Light-irradiation heat treatment method and heat treatment apparatus
Over a front surface of a silicon semiconductor wafer is deposited a high dielectric constant film with a silicon oxide film, serving as an interface layer, provided between the semiconductor wafer and the high dielectric constant film. After a chamber houses the semiconductor wafer, a chamber's pressure is reduced to be lower than atmospheric pressure. Subsequently, a gaseous mixture of ammonia and nitrogen gas is supplied into the chamber to return the pressure to ordinary pressure, and the front surface is irradiated with a flash light, thereby performing post deposition annealing (PDA) on the high dielectric constant film. Since the pressure is reduced once to be lower than atmospheric pressure and then returned to ordinary pressure, a chamber's oxygen concentration is lowered remarkably during the PDA. This restricts an increase in thickness of the silicon oxide film underlying the high dielectric constant film by oxygen taken in during the PDA.