H01L21/304

Electrode with alloy interface

An electrode structure with an alloy interface is provided. In one aspect, a method of forming a contact structure includes: patterning a via in a first dielectric layer; depositing a barrier layer onto the first dielectric layer, lining the via; depositing and polishing a first metal layer (Element A) into the via to form a contact in the via; depositing a second metal layer (Element B) onto the contact in the via; annealing the first and second metal layers under conditions sufficient to form an alloy AB; depositing a third metal layer onto the second metal layer; patterning the second and third metal layers into a pedestal stack over the contact to form an electrode over the contact, wherein the alloy AB is present at an interface of the electrode and the contact; and depositing a second dielectric that surrounds the pedestal stack. A contact structure is also provided.

Temperature-based assymetry correction during CMP and nozzle for media dispensing

A chemical mechanical polishing apparatus includes a rotatable platen to hold a polishing pad, a rotatable carrier to hold a substrate against a polishing surface of the polishing pad during a polishing process, a polishing liquid supply port to supply a polishing liquid to the polishing surface, a thermal control system including a movable nozzle to spray a medium onto the polishing surface to adjust a temperature of a zone on the polishing surface, an actuator to move the nozzle radially relative to an axis of rotation of the platen, and a controller configured to coordinate dispensing of the medium from the nozzle with motion of the nozzle across the polishing surface.

Temperature-based assymetry correction during CMP and nozzle for media dispensing

A chemical mechanical polishing apparatus includes a rotatable platen to hold a polishing pad, a rotatable carrier to hold a substrate against a polishing surface of the polishing pad during a polishing process, a polishing liquid supply port to supply a polishing liquid to the polishing surface, a thermal control system including a movable nozzle to spray a medium onto the polishing surface to adjust a temperature of a zone on the polishing surface, an actuator to move the nozzle radially relative to an axis of rotation of the platen, and a controller configured to coordinate dispensing of the medium from the nozzle with motion of the nozzle across the polishing surface.

DMOS FET chip scale package and method of making the same

A method comprises the steps of providing a wafer; applying a redistribution layer, grinding a back side of the wafer; depositing a metal layer; and applying a singulation process. A semiconductor package comprises a metal-oxide-semiconductor field-effect transistor (MOSFET), a redistribution layer, and a metal layer. The MOSFET comprises a source electrode, a gate electrode, a drain electrode and a plurality of partial drain plugs. The source electrode, the gate electrode, and the drain electrode are positioned at a front side of the MOSFET.

DMOS FET chip scale package and method of making the same

A method comprises the steps of providing a wafer; applying a redistribution layer, grinding a back side of the wafer; depositing a metal layer; and applying a singulation process. A semiconductor package comprises a metal-oxide-semiconductor field-effect transistor (MOSFET), a redistribution layer, and a metal layer. The MOSFET comprises a source electrode, a gate electrode, a drain electrode and a plurality of partial drain plugs. The source electrode, the gate electrode, and the drain electrode are positioned at a front side of the MOSFET.

METHOD FOR FORMING SEMICONDUCTOR STRUCTURE AND SEMICONDUCTOR STRUCTURE
20230009114 · 2023-01-12 ·

A method for forming a semiconductor structure is provided. The method includes: providing a substrate; forming a groove in the substrate, in which a side wall of the groove is formed by sequential connection of a plurality of pits recessed into the substrate; forming a first material in the groove, in which the pits are completely filled with the first material; and exposing and developing the first material in the groove to obtain a through via structure.

WAFER POLISHING HEAD, SYSTEM THEREOF, AND METHOD USING THE SAME

A wafer polishing head is provided. The wafer polishing head includes a carrier head, a plurality of piezoelectric actuators disposed on the carrier head, and a membrane disposed over the plurality of piezoelectric actuators. The plurality of piezoelectric actuators is configured to provide mechanical forces on the membrane and generate an electrical charge when receiving counterforces of the mechanical forces through the membrane. A wafer polishing system and a method for polishing a substrate using the same are also provided.

LAMINATED POLISHING PAD

The CMP laminated polishing pad of the present invention includes at least a polishing layer and an under layer, wherein the under layer contains a resin obtained by polymerizing a polymerizable composition containing: (A) a polyrotaxane monomer having at least two polymerizable functional groups in a molecule; and (B) a polymerizable monomer other than the polyrotaxane monomer having at least two polymerizable functional groups in a molecule. According to the present invention, a polishing pad having not only good wear resistance but also excellent polishing characteristics (high polishing rate, low scratch property, and high flatness) can be provided.

GENERATING A LOW-TEMPERATURE SUBSTRATE PROTECTIVE LAYER
20230215726 · 2023-07-06 ·

A method for depositing protective layers on a surface of a substrate includes conducting a plurality of ALD cycles in a first reaction chamber to deposit a first protective layer on the substrate. Each ALD cycle of the plurality of ALD cycles is conducted at a deposition temperature below about 100° C. and includes delivering a first precursor gas into the first reaction chamber containing the substrate. A reacting portion of the first precursor gas is absorbed onto a surface of the substrate to form a first sub-layer of the protective layer. A second precursor gas is delivered into the first reaction chamber containing the substrate, a reacting portion of the second precursor gas being absorbed onto the surface of the substrate to form a second sub-layer of the protective layer. Metrology analysis is performed on the substrate within a second reaction chamber.

GENERATING A LOW-TEMPERATURE SUBSTRATE PROTECTIVE LAYER
20230215726 · 2023-07-06 ·

A method for depositing protective layers on a surface of a substrate includes conducting a plurality of ALD cycles in a first reaction chamber to deposit a first protective layer on the substrate. Each ALD cycle of the plurality of ALD cycles is conducted at a deposition temperature below about 100° C. and includes delivering a first precursor gas into the first reaction chamber containing the substrate. A reacting portion of the first precursor gas is absorbed onto a surface of the substrate to form a first sub-layer of the protective layer. A second precursor gas is delivered into the first reaction chamber containing the substrate, a reacting portion of the second precursor gas being absorbed onto the surface of the substrate to form a second sub-layer of the protective layer. Metrology analysis is performed on the substrate within a second reaction chamber.