A semiconductor wafer processing method, having: ablating a back side of a semiconductor wafer with a laser ablation process; and etching the back side of the semiconductor wafer with an etching process; wherein the laser ablation process forms a pattern in the back side of the semiconductor wafer; wherein the etching process preserves the pattern in the back side of the semiconductor wafer.

Structures and formation methods of a chip package structure are provided. The chip package structure includes adjacent first and second semiconductor dies bonded over an interposer substrate. The chip package structure also includes an insulating layer formed over the interposer substrate. The insulating layer has a first portion surrounding the first and second semiconductor dies and a second portion extending between a first sidewall of the first semiconductor die and a second sidewall of the second semiconductor die, and between the interposer substrate and the first and second semiconductor dies. The lateral distance from the top end of the first sidewall to the top end of the second sidewall is greater than the lateral distance from the bottom end of the first sidewall to the bottom end of the second sidewall.

Techniques related to forming selective gate spacers for semiconductor devices and transistor structures and devices formed using such techniques are discussed. Such techniques include forming a blocking material on a semiconductor fin, disposing a gate having a different surface chemistry than the blocking material on a portion of the blocking material, forming a selective conformal layer on the gate but not on a portion of the blocking material, and removing exposed portions of the blocking material.

A method for manufacturing a semiconductor device includes forming semiconductor devices from a semiconductor wafer and identifying a position of the semiconductor device in the semiconductor wafer, wherein the forming the semiconductor devices includes forming a first repeating pattern including i semiconductor devices each having a unique pattern, forming a second repeating pattern including j semiconductor devices each having a unique pattern, defining semiconductor devices on the semiconductor wafer such that each of the k semiconductor devices has a unique pattern based on the first and second repeating patterns, and grinding a backside of the semiconductor wafer, wherein each unique pattern of the k semiconductor devices is composed of a combination of the unique patterns of the first and second repeating patterns, wherein the position of the semiconductor device is identified based on the unique patterns of the first and second repeating patterns and an angle of a grinding mark.

A method for manufacturing a semiconductor device includes forming semiconductor devices from a semiconductor wafer and identifying a position of the semiconductor device in the semiconductor wafer, wherein the forming the semiconductor devices includes forming a first repeating pattern including i semiconductor devices each having a unique pattern, forming a second repeating pattern including j semiconductor devices each having a unique pattern, defining semiconductor devices on the semiconductor wafer such that each of the k semiconductor devices has a unique pattern based on the first and second repeating patterns, and grinding a backside of the semiconductor wafer, wherein each unique pattern of the k semiconductor devices is composed of a combination of the unique patterns of the first and second repeating patterns, wherein the position of the semiconductor device is identified based on the unique patterns of the first and second repeating patterns and an angle of a grinding mark.

A method of semiconductor die singulation is provided. The method includes forming a first trench along a singulation lane of a semiconductor wafer. A second trench is formed extending from a bottom of the first trench. A portion of the semiconductor wafer remains between a bottom of the second trench and a backside of the semiconductor wafer. A cut is formed by way of a laser to singulate die of the semiconductor wafer. The cut extends through the portion of the semiconductor wafer remaining between the bottom of the second trench and the backside of the semiconductor wafer.

A grinding apparatus including a chuck table for holding a wafer, a grinding unit having a spindle for rotating a grinding wheel, an inclination adjusting unit for adjusting the inclination of the rotation axis of the chuck table with respect to the rotation axis of the spindle, a touch panel, and a control portion. The control portion is adapted to compare the information regarding the target sectional shape input into a target shape input field with the information regarding the present sectional shape input into a present shape input field and then control the inclination adjusting unit to change the inclination of the rotation axis of the chuck table so that the wafer is ground to obtain the target sectional shape of the wafer.

A grinding apparatus including a chuck table for holding a wafer, a grinding unit having a spindle for rotating a grinding wheel, an inclination adjusting unit for adjusting the inclination of the rotation axis of the chuck table with respect to the rotation axis of the spindle, a touch panel, and a control portion. The control portion is adapted to compare the information regarding the target sectional shape input into a target shape input field with the information regarding the present sectional shape input into a present shape input field and then control the inclination adjusting unit to change the inclination of the rotation axis of the chuck table so that the wafer is ground to obtain the target sectional shape of the wafer.

A particle removed from a substrate is suppressed from adhering to the substrate again. A substrate cleaning apparatus includes a substrate holder configured to hold the substrate; a gas nozzle configured to jet a cleaning gas to the substrate on the substrate holder; and a nozzle cover provided to surround the gas nozzle. The cleaning gas is jetted to a decompression chamber of the nozzle cover from the gas nozzle, and a gas cluster configured to remove the particle on the substrate in the decompression chamber is generated. A gas for a gas curtain is jetted from a holder support of the substrate holder toward the nozzle cover, and the gas curtain is formed between the nozzle cover and the holder support.

Provided are a chemical mechanical polishing composition and a chemical mechanical polishing method that can polish a semiconductor substrate containing an electric conductor metal, such as tungsten or cobalt, flat and at high speed, and reduce post-polishing surface defects. The chemical mechanical polishing composition contains (A) silica particles having the functional group represented by general formula (1), and (B) at least one selected from the group consisting of a carboxylic acid having an unsaturated bond and a salt thereof. (1): —COO-M+ (M+ represents a monovalent cation.)