In an LED module, modes to solve such a problem that a loss in the output of light discharged into the atmosphere occurs are embodied. Specifically, in an LED module in which an LED chip is sealed with a sealing resin, a surface of the sealing resin is covered with a thin film, the thin film is made of a material having a smaller linear expansion coefficient than the sealing resin, and an irregular surface is provided on a surface of the thin film such that light from the LED chip is multiply reflected.

Methods of producing metal-containing thin films with low impurity contents on a substrate by atomic layer deposition (ALD) are provided. The methods preferably comprise contacting a substrate with alternating and sequential pulses of a metal source chemical, a second source chemical and a deposition enhancing agent. The deposition enhancing agent is preferably selected from the group consisting of hydrocarbons, hydrogen, hydrogen plasma, hydrogen radicals, silanes, germanium compounds, nitrogen compounds, and boron compounds. In some embodiments, the deposition-enhancing agent reacts with halide contaminants in the growing thin film, improving film properties.

Warpage and breakage of integrated circuit substrates is reduced by compensating for the stress imposed on the substrate by thin films formed on a surface of the substrate. Particularly advantageous for substrates having a thickness substantially less than about 150 ?m, a stress-tuning layer is formed on a surface of the substrate to substantially offset or balance stress in the substrate which would otherwise cause the substrate to bend. The substrate includes a plurality of bonding pads on a first surface for electrical connection to other component.

Warpage and breakage of integrated circuit substrates is reduced by compensating for the stress imposed on the substrate by thin films formed on a surface of the substrate. Particularly advantageous for substrates having a thickness substantially less than about 150 ?m, a stress-tuning layer is formed on a surface of the substrate to substantially offset or balance stress in the substrate which would otherwise cause the substrate to bend. The substrate includes a plurality of bonding pads on a first surface for electrical connection to other component.

Method of deposition on a substrate of a dielectric film by introducing into a reaction chamber a vapor of a precursor selected from the group consisting of Zr(MeCp)(NMe.sub.2).sub.3, Zr(EtCp)(NMe.sub.2).sub.3, ZrCp(NMe.sub.2).sub.3, Zr(MeCp)(NEtMe).sub.3, Zr(EtCp)(NEtMe).sub.3, ZrCp(NEtMe).sub.3, Zr(MeCp)(NEt.sub.2).sub.3, Zr(EtCp)(NEt.sub.2).sub.3, ZrCp(NEt.sub.2).sub.3, Zr(iPr.sub.2Cp)(NMe.sub.2).sub.3, Zr(tBu.sub.2Cp)(NMe.sub.2).sub.3, Hf(MeCp)(NMe.sub.2).sub.3, Hf(EtCp)(NMe.sub.2).sub.3, HfCp(NMe.sub.2).sub.3, Hf(MeCp)(NEtMe).sub.3, Hf(EtCp)(NEtMe).sub.3, HfCp(NEtMe).sub.3, Hf(MeCp)(NEt.sub.2).sub.3, Hf(EtCp)(NEt.sub.2).sub.3, HfCp(NEt.sub.2).sub.3, Hf(iPr.sub.2Cp)(NMe.sub.2).sub.3, Hf(tBu.sub.2Cp)(NMe.sub.2).sub.3, and mixtures thereof; and depositing the dielectric film on the substrate.

Disclosed is a multilayer insulator, a metal-insulator-metal (MIM) capacitor with the same, and a fabricating method thereof. The capacitor includes: a first electrode; an insulator disposed on the first electrode, the insulator including: a laminate structure in which an aluminum oxide (Al.sub.2O.sub.3) layer and a hafnium oxide (HfO.sub.2) layer are laminated alternately in an iterative manner and a bottom layer and a top layer are formed of the same material; and a second electrode disposed on the insulator.

The reliability of wirings, each of which includes a main conductive film containing copper as a primary component, is improved. On an insulating film including the upper surface of a wiring serving as a lower layer wiring, an insulating film formed of a silicon carbonitride film having excellent barrier properties to copper is formed; on the insulating film, an insulating film formed of a silicon carbide film having excellent adhesiveness to a low dielectric constant material film is formed; on the insulating film, an insulating film formed of a low dielectric constant material as an interlayer insulating film is formed; and thereafter a wiring as an upper layer wiring is formed.

Semiconductor devices and a method for forming the same are provided. In various embodiments, a method for forming a semiconductor device includes receiving a semiconductor substrate including a channel. An atmosphere-modulation layer is formed over the channel. An annealing process is performed to form an interfacial layer between the channel and the atmosphere-modulation layer.

A method of scaling a nonvolatile trapped-charge memory device and the device made thereby is provided. In an embodiment, the method includes forming a channel region including polysilicon electrically connecting a source region and a drain region in a substrate. A tunneling layer is formed on the substrate over the channel region by oxidizing the substrate to form an oxide film and nitridizing the oxide film. A multi-layer charge trapping layer including an oxygen-rich first layer and an oxygen-lean second layer is formed on the tunneling layer, and a blocking layer deposited on the multi-layer charge trapping layer. In one embodiment, the method further includes a dilute wet oxidation to densify a deposited blocking oxide and to oxidize a portion of the oxygen-lean second layer.

The embodiments herein relate to methods and apparatus for depositing an encapsulation layer over memory stacks in MRAM and PCRAM applications. The encapsulation layer is a titanium dioxide (TiO.sub.2) layer deposited through an atomic layer deposition reaction. In some embodiments, the encapsulation layer may be deposited as a bilayer, with an electrically favorable layer formed atop a protective layer. In certain implementations, gaps between neighboring memory stacks may be filled with titanium oxide, for example through an atomic layer deposition reaction or a chemical vapor deposition reaction.