A method for transferring a semiconductor layer from a donor substrate to a receiver substrate having an open cavity includes forming an embrittlement plane in the donor substrate, making, by bringing the donor substrate and the receiver substrate into contact, a packaging in which the cavity is buried, and separating the packaging by fracturing along the embrittlement plane. The separating causes a transfer of the semiconductor layer to the receiver substrate and a sealing of the cavity by the semiconductor layer. The method also includes, prior to making the packaging, implanting diffusing species into the donor substrate or into the receiver substrate and, subsequently to making the packaging and prior to separating the packaging, diffusing the species into the cavity.

In one example, a method includes providing a first side of a semiconductor substrate with a plurality of transistors, etching a second side of the substrate, opposite the first side, with a pattern of trenches, the trenches having a pre-defined depth and width, and providing the etched semiconductor substrate in a package. In one example, the predefined depth and width of the trenches is such so as to increase the surface area of the second side of the substrate by at least 20 percent. In one example, the method also includes providing a layer of a thermal interface material (TIM) on the second side of the substrate, including to fill at least a portion of the trenches.

A semiconductor structure and a method for forming a semiconductor structure are provided. In some embodiments, a method is provided. The method includes following operations. A sacrificial gate structure is formed over a fin structure. The sacrificial gate structure includes a sacrificial gate layer and a sacrificial dielectric layer. The sacrificial gate layer is removed to form a gate trench exposing the sacrificial dielectric layer. A doped region is formed in the fi structure covered by the sacrificial dielectric layer. The sacrificial dielectric layer, a portion of the doped region and a portion of the fin structure are removed from the gate trench. An interfacial layer is formed over the fin structure in the gate trench.

A silicon carbide (carborundum) semiconductor device and a manufacturing method thereof. The manufacturing method of the silicon carbide semiconductor device comprises the following steps of: providing a semiconductor component structure on a silicon carbide substrate, the semiconductor component structure being formed on a front side of the silicon carbide substrate; and forming a multi-layer structure on a back side of the silicon carbide substrate, the multi-layer structure comprising a plurality of ohmic contact layers and a plurality of gettering material layers. By dispersing the gettering material into multiple layers, and by adjusting a thickness combination of the ohmic contact layer and the gettering material layer, even if the gettering material layer is relatively thin (thickness sufficient for balling), a content is still sufficient for gettering carbon and reducing carbon aggregation and accumulation.

A manufacturing method of an epitaxial silicon wafer includes forming an epitaxial film made of silicon on a surface of a silicon wafer in a trichlorosilane gas atmosphere; and setting the nitrogen concentration of the surface of the epitaxial film through inward diffusion from a nitride film on the epitaxial film, the nitride film being formed by subjecting the silicon wafer provided with the epitaxial film to heat treatment in a nitrogen atmosphere.

A method includes forming a metal-oxide-semiconductor field-effect transistor (MOSFET). The Method includes performing an implantation to form a pre-amorphization implantation (PAI) region adjacent to a gate electrode of the MOSFET, forming a strained capping layer over the PAI region, and performing an annealing on the strained capping layer and the PAI region to form a dislocation plane. The dislocation plane is formed as a result of the annealing, with a tilt angle of the dislocation plane being smaller than about 65 degrees.

Provided is a method of producing a semiconductor epitaxial wafer having enhanced gettering ability. The method of producing a semiconductor epitaxial wafer includes: a first step of irradiating a surface of a semiconductor wafer with cluster ions to form a modified layer that is located in a surface portion of the semiconductor wafer and that includes a constituent element of the cluster ions in solid solution; and a second step of forming an epitaxial layer on the modified layer of the semiconductor wafer. The first step is performed in a state in which a temperature of the semiconductor wafer is maintained at lower than 25° C.

The present invention relates to a vertical semiconductor device such as an IGBT or a diode which includes an N buffer layer formed in the undersurface of and adjacent to an N.sup.− drift layer. A concentration slope δ, which is derived from displacements in a depth TB (μm) and an impurity concentration CB (cm.sup.−3), from the upper surface to the lower surface in a main portion of the N buffer layer satisfies a concentration slope condition defined by {0.03≦δ≦0.7}.

In a step, acceptor ions are implanted from a back surface of a semiconductor substrate. In a step, a wet process of immersing the semiconductor substrate in a chemical solution including hydrofluoric acid is performed, to introduce hydrogen atoms into the semiconductor substrate. In a step, proton radiation is provided to the back surface of the semiconductor substrate, to introduce hydrogen atoms into the semiconductor substrate and form radiation-induced defects. In a step, an annealing process is performed on the semiconductor substrate, to form hydrogen-related donors by reaction of the hydrogen atoms and the radiation-induced defects and reduce the radiation-induced defects.

A bonded structure is disclosed. The bonded structure can include a first element that has a first bonding surface. The bonded structure can further include a second element that has a second bonding surface. The first and second bonding surfaces are bonded to one another along a bonding interface. The bonded structure can also include an integrated device that is coupled to or formed with the first element or the second element. The bonded structure can further include a channel that is disposed along the bonding interface around the integrated device to define an effectively closed profile The bonded structure can also include a getter material that is disposed in the channel. The getter material is configured to reduce the diffusion of gas into an interior region of the bonded structure.