Patent classifications
H01L21/469
Method for producing silicon nitride film and silicon nitride film
One object of the present invention is to provide a method for producing a silicon nitride film having a high hydrofluoric acid resistance, a high moisture resistance and an appropriate internal stress on a substrate of which the temperature is controlled at 250 C. or lower, the present invention provides a method for producing a silicon nitride film (30) by a plasma chemical vapor deposition method, wherein a processing gas obtained by adding a hydrogen reducing gas in a range of 200 to 2000 volumetric flow rate to an organosilane gas of 1 volumetric flow rate is used, a pressure in a process chamber (40) accommodating the substrate (20) is adjusted to be in a range of 35 to 400 Pa, and a density of high-frequency electric power applied to an electrode installed in the process chamber (40) is adjusted to be in a range of 0.2 to 3.5 W/cm.sup.2.
Method of forming a directed self-assembled layer on a substrate
A method of forming a directed self-assembled (DSA) layer on a substrate by: providing a substrate; applying a layer comprising a self-assembly material on the substrate; and annealing of the self-assembly material of the layer to form a directed self-assembled layer by providing a controlled temperature and gas environment around the substrate. The controlled gas environment comprises molecules comprising an oxygen element with a partial pressure between 10-2000 Pa.
Method of forming a directed self-assembled layer on a substrate
A method of forming a directed self-assembled (DSA) layer on a substrate by: providing a substrate; applying a layer comprising a self-assembly material on the substrate; and annealing of the self-assembly material of the layer to form a directed self-assembled layer by providing a controlled temperature and gas environment around the substrate. The controlled gas environment comprises molecules comprising an oxygen element with a partial pressure between 10-2000 Pa.
Formation method of semiconductor device with gate spacer
A structure and a formation method of a semiconductor device structure are provided. The method includes forming a gate stack over a semiconductor substrate. The method also includes forming a sealing layer over a sidewall of the gate stack using an atomic layer deposition process. The atomic layer deposition process includes alternately and sequentially introducing a first silicon-containing precursor gas and a second silicon-containing precursor gas over the sidewall of the gate stack to form the sealing layer. The second silicon-containing precursor gas has a different atomic concentration of carbon than that of the first silicon-containing precursor gas. The method further includes partially removing the sealing layer to form a sealing element over the sidewall of the gate stack.
Laser devices using a semipolar plane
An optical device includes a gallium and nitrogen containing substrate comprising a surface region configured in a (20-2-1) orientation, a (30-3-1) orientation, or a (30-31) orientation, within +/10 degrees toward c-plane and/or a-plane from the orientation. Optical devices having quantum well regions overly the surface region are also disclosed.
Dynamic temperature control of substrate support in substrate processing system
A temperature-controlled substrate support for a substrate processing system includes a substrate support located in the processing chamber. The substrate support includes N zones and N resistive heaters, respectively, where N is an integer greater than one. A temperature sensor is located in one of the N zones. A controller is configured to calculate N resistances of the N resistive heaters during operation and to adjust power to N?1 of the N resistive heaters during operation of the substrate processing system in response to the temperature measured in the one of the N zones by the temperature sensor, the N resistances of the N resistive heaters, and N?1 resistance ratios.
Nanoparticle with plural functionalities, and method of forming the nanoparticle
A method of forming a nanoparticle includes forming a layer of semiconductor material on a substrate, forming a first layer on the semiconductor material, and etching the semiconductor layer to form the nanoparticle including the first layer on a first side of the nanoparticle and the semiconductor material on a second side of the nanoparticle.
Methods and apparatuses for increasing reactor processing batch size
Certain embodiments herein relate to methods of increasing a reaction chamber batch size. A portion of a batch of wafers is processed within the chamber. The processing results in at least some off-target deposition of material on interior surfaces of the reaction chamber. A mid-batch chamber processing is conducted to stabilize the off-target deposition materials accumulated on the chamber interior surfaces. Another portion of the batch of wafers is processed within the chamber. In various embodiments, processing of the chamber (e.g., mid-batch) and subsequent portion of the batch of wafers is repeated until processing of all wafers is complete. Batch size refers to the number of wafers that may be processed in the reaction chamber between chamber clean cycles. Chamber interior surfaces are seasoned prior to batch processing. Seasoning of the chamber interior surfaces involves applying a coating of the same material that may be used for deposition on the wafers during processing of the same.
Selective film deposition using halogen deactivation
Embodiments of the invention provide selective film deposition in a recessed feature of a substrate using halogen deactivation. A substrate processing method includes a) providing a substrate containing a field area and a recessed feature having a sidewall and a bottom, b) exposing the substrate to a first precursor gas to form a first precursor layer on the substrate, c) exposing the substrate to a plasma-excited halogen-containing gas to deactivate or at least partially remove the first precursor layer on the field area of the substrate and the bottom of the recessed feature, and d) exposing the substrate to a second precursor gas that reacts with the first precursor layer to form a material layer on the sidewall of the recessed feature but not on the field area and the bottom of the recessed feature that has been deactivated by the plasma-excited halogen-containing gas.
Formation and in-situ treatment processes for gap fill layers
The present disclosure relates to a semiconductor device and a manufacturing method, and more particularly to a semiconductor device having an enhanced gap fill layer in trenches. The present disclosure provides a novel gap fill layer formed using a multi-step deposition and in-situ treatment process. The deposition process can be a flowable chemical vapor deposition (FCVD) utilizing one or more assist gases and molecules of low reactive sticking coefficient (RSC). The treatment process can be an in-situ process after the deposition process and includes exposing the deposited gap fill layer to plasma activated assist gas. The assist gas can be formed of ammonia. The low RSC molecule can be formed of trisilylamin (TSA) or perhydropolysilazane (PHPS).