Methods, systems and devices are disclosed for performing a semiconductor processing operation. In some embodiments this includes configuring a wire bonding machine to perform customized movements with a capillary tool of the wire bonding machine, etching bulk contaminants over one or more locations of a semiconductor device with the capillary tool, and applying plasma to the semiconductor device to remove residual contaminants.

There is provided a metal component used for manufacturing a semiconductor device, including: a base material having an electrical conductivity; a nickel layer formed on a surface of the base material and containing nickel as a main component; and a noble metal layer formed on a surface of the nickel layer. The nickel layer includes a first nickel layer not containing phosphorus, and a second nickel layer containing 0.01 to 1 in percent by weight of phosphorus. According to the metal component of the present disclosure, a thickness of the nickel layer can be reduced while good characteristics can be maintained.

Methods, systems and devices are disclosed for performing a semiconductor processing operation. In some embodiments this includes configuring a wire bonding machine to perform customized movements with a capillary tool of the wire bonding machine, etching bulk contaminants over one or more locations of a semiconductor device with the capillary tool, and applying plasma to the semiconductor device to remove residual contaminants.

A waterjet nozzle is provided for deflashing a leadless package device. The waterjet nozzle has a central core having a conically shaped passage between a nozzle inlet, lying in a first plane, and a nozzle outlet, lying in a second plane. The nozzle includes a groove, in the waterjet nozzle, above a third plane defining an end of the waterjet nozzle, along a first line in the third plane. A tube connects the nozzle outlet to the groove. The nozzle includes a flange, lying below the third plane along a second line, in the third plane, intersecting the first line. The waterjet nozzle may be used to deflash a leadframe package by inserting the flange from a waterjet nozzle into a singulation cut on a lead frame; and injecting a waterjet through the conically-shaped passage from the nozzle inlet through the nozzle outlet.

A semiconductor device includes a die paddle, a plurality of electrically conductive leads extending away from the die paddle, and an adhesion promoter plating material selectively formed on the electrically conductive leads such that outer portions of the leads are covered by the adhesion promoter plating material, and interior portions of the leads that are disposed between the die paddle and the respective outer portions of each lead are substantially devoid of the adhesion promoter plating material.

After a die bonding step, a wire bonding step is performed to electrically connect the plurality of pad electrodes and the plurality of leads of the semiconductor chip via a plurality of copper wires. A plating layer is formed on a surface of the lead, and a copper wire is connected to the plating layer in the wire bonding step. The plating layer is a silver plating layer. After the die bonding step, an oxygen plasma treatment is performed on the lead frame and the semiconductor chip before the wire bonding step, and then the surface of the plating layer is reduced.

A leadless integrated circuit (IC) package includes a spaced apart plurality of lead terminals on at least two sides of the leadless IC package, and an IC die including a substrate having at least a semiconductor surface including circuitry coupled to bond pads with the bond pads having bonding features thereon. The bonding features are flip chip bonded to the plurality of lead terminals. Mold compound is above the IC die and between adjacent lead terminals. The lead terminals and the substrate both extend out to have exposed surfaces at edges of the leadless IC package, and the lead terminals also provide a back side bondable contact.

According to an embodiment of the disclosure, a method of fabricating a carrier for a wafer level package (WLP) by using a lead frame, wherein the lead frame is fabricated by forming a trench and a post by performing first half etching on an upper surface of a base substrate comprising a conductive material, filling the first-half-etched surface with resin of an insulating material, removing the resin exposed to outside of the trench so that an upper surface of the trench and an upper surface of the resin are at a same level, and performing second half etching on a lower surface of the base substrate, in which a memory chip is attached to the lower surface of the base substrate.

A semiconductor package includes a pad and leads, the pad and leads including a base metal predominantly including copper, a first plated metal layer predominantly including nickel in contact with the base metal, and a second plated metal layer predominantly including silver in contact with the first plated metal layer. The first plated metal layer has a first plated metal layer thickness of 0.1 to 5 microns, and the second plated metal layer has a second plated metal layer thickness of 0.2 to 5 microns. The semiconductor package further includes an adhesion promotion coating predominantly including silver oxide in contact with the second plated metal layer opposite the first plated metal layer, a semiconductor die mounted on the pad, a wire bond extending between the semiconductor die and a lead of the leads, and a mold compound covering the semiconductor die and the wire bond.

A method for manufacturing a semiconductor package assembly is provided. The assembly includes a semiconductor package and a molding resin case encapsulating the semiconductor package. The complete semiconductor package undergoes a surface roughening treatment, thus improving the overall adhesion with the molding resin (EMC) and reducing the risks of delamination.