A semiconductor package includes a leadframe forming a plurality of leads with a die attach site, a semiconductor die including a set of die contacts mounted to the die attach site in a flip chip configuration with each die contact of the set of die contacts electrically connected to leadframe via one of a set of solder joints, a set of solder joint capsules covering each of the set of solder joints against the leadframe, a clip mounted to the leadframe over the semiconductor die with a clip solder joint. The solder joint capsules restrict flow of the solder joints of the semiconductor die contacts in the flip chip configuration such that the solder remains in place if remelted during later clip solder reflow.

The invention relates to a module (1) in which voltages greater than 1,000 V and currents greater than 100 A are applied via supply lines, with an electrically insulating carrier (2), with a connection means (3) which has a material thickness greater than 0.3 mm and is connected to the carrier (2) via a metallization area (4) which is delimited by a first end (23) and a second end (24), with electronic components (19, 20) which are connected to the connection means (3) as required, and with cooling means (14). In order that the power is supplied from the outside via the connection means (3) directly to the module and thus the bonding processes that are customary in the prior art are omitted and parasitic inductances on the power supply are avoided, the invention proposes that the connection means (3) protrudes beyond one end (23, 24) of the metallization area (4) at least at one point, is not fixed to the carrier (2) in this area (9) and has contact means (22).

A method of manufacturing an electronic module includes supplying paste to an electronic component and/or a wiring board. The paste includes solder powder and first resin. The method includes supplying second resin to the electronic component and/or the wiring board. The method includes placing one of the electronic component and the wiring board on another. The method includes curing the second resin to form a second resin portion. The method includes heating the paste to a temperature equal to or higher than a solder melting point after the second resin portion is formed. The method includes solidifying molten solder at a temperature lower than the solder melting point to form a solder portion that bonds the electronic component and the wiring board. The method includes curing the first resin after the solder portion is formed, to form a first resin portion.

A bottom side interposer provides a structurally balanced chip carrier module to reduce thermal warp and increase package robustness. The bottom side interposer is attached to the bottom of a chip carrier which carries semiconductor chips on the top side of the chip carrier. The top side of the chip carrier typically includes a top side interposer between the semiconductor chips and the chip carrier. The bottom side interposer has a coefficient of thermal expansion (CTE) that is similar to the chips and top side interposer, or tailored to have a CTE intermediate to the chips and the chip carrier. Pads on the bottom side interposer may be plated or fitted with solder balls to complete the module so the module can be connected to a printed circuit board.

A semiconductor device includes: a metal sheet; an insulating pattern provided on the metal sheet; a power circuit pattern and a signal circuit pattern that are provided on the insulating pattern; a power semiconductor chip mounted on the power circuit pattern; and a control semiconductor chip that is mounted on the signal circuit pattern and controls the power semiconductor chip. The power semiconductor chip is bonded to the power circuit pattern with a first die bonding material comprised of copper, and the control semiconductor chip is bonded to the signal circuit pattern with a second die bonding material.

An applying method includes the following steps. Firstly, a conductive adhesive including a plurality of conductive particles and an insulating binder is provided. Then, a carrier plate is provided. Then, a patterned adhesive is formed on the carrier plate by the conductive adhesive, wherein the patterned adhesive includes a first transferring portion. Then, a manufacturing device including a needle is provided. Then, the needle of the manufacturing device is moved to contact the first transferring portion. Then, the transferring portion is transferred to a board by the manufacturing device.

A semiconductor package using a coreless signal distribution structure (CSDS) is disclosed and may include a CSDS comprising at least one dielectric layer, at least one conductive layer, a first surface, and a second surface opposite to the first surface. The semiconductor package may also include a first semiconductor die having a first bond pad on a first die surface, where the first semiconductor die is bonded to the first surface of the CSDS via the first bond pad, and a second semiconductor die having a second bond pad on a second die surface, where the second semiconductor die is bonded to the second surface of the CSDS via the second bond pad. The semiconductor package may further include a metal post electrically coupled to the first surface of the CSDS, and a first encapsulant material encapsulating side surfaces and a surface opposite the first die surface of the first semiconductor die, the metal post, and a portion of the first surface of the CSDS.

A flexible circuit board and an electronic device including a flexible circuit board are provided. The flexible circuit board may include a substrate having a bending area and a non-bending area, a wiring pattern layer provided on the bending area and the non-bending area, a plating layer provided on the wiring pattern layer and including an open area in an area corresponding to the bending area, and a protective layer that directly contacts one surface of the wiring pattern layer exposed at the open area and a side surface of the plating layer. The protective layer may have a larger thickness than a thickness of the plating layer.

A method for producing a flat feature on a substrate, comprises the steps of printing a deposit of print medium onto the substrate, the printed deposit comprising an upper surface, modifying the upper surface of the printed deposit, for example by partially drying the printed deposit, and levelling the modified deposit to produce a flat feature.

A flexible circuit board and an electronic device including a flexible circuit board are provided. The flexible circuit board may include a substrate having a bending area and a non-bending area, a wiring pattern layer provided on the bending area and the non-bending area, a plating layer provided on the wiring pattern layer and including an open area in an area corresponding to the bending area, and a protective layer that directly contacts one surface of the wiring pattern layer exposed at the open area and a side surface of the plating layer. The protective layer may have a larger thickness than a thickness of the plating layer.