Solder bumps are placed in direct contact with the silicon substrate of an amplifier integrated circuit having a flip chip configuration. A plurality of amplifier transistor arrays generate waste heat that promotes thermal run away of the amplifier if not directed out of the integrated circuit. The waste heat flows through the thermally conductive silicon substrate and out the solder bump to a heat-sinking plane of an interposer connected to the amplifier integrated circuit via the solder bumps.

A device can comprise a plurality of layers stacked and bonded on one another, wherein at least one layer of the plurality of layers comprises: a first active region comprising first pin portions positioned in a first planar arrangement; and a second active region comprising second pin portions positioned in a second planar arrangement, wherein the second planar arrangement is different from the first planar arrangement. The device can also comprise a conformable layer adjacent to at least one of the plurality of layers.

A heat sink comprising a body non-adjustably mountable on a support provided with at least one element to be cooled, characterized in that said body comprises at least one insert that is adjustably fitted therein so that an insert contact surface comes into contact with the element to be cooled.

This application discloses a board, an electronic device, and a manufacturing method, and pertains to the field of bare die package technologies. The board includes a PCB assembly, a bare die, a reinforcing frame, a heat sink, and fasteners. Both the bare die and the reinforcing frame are located on a surface of the PCB assembly, the bare die is located in the reinforcing frame, and the reinforcing frame is fixedly connected to the PCB assembly by using the fastener. The heat sink is located on a surface of the bare die that is away from the PCB assembly, and the heat sink is fixedly connected to the reinforcing frame by using the fastener.

Liquid metal thermal interface materials and their uses in electronics assembly are described. In one implementation, a semiconductor assembly includes: a semiconductor die; a heat exchanger; and a thermal interface material (TIM) alloy bonding the semiconductor die to the heat exchanger without using a separate metallization layer on a surface of the semiconductor die or a surface of the heat exchanger. The TIM alloy may be formed by placing a TIM material between the semiconductor die and the heat exchanger, the TIM material comprising a first liquid metal foam in touching relation with the surface of the semiconductor die, a second liquid metal foam in touching relation with the surface of the heat exchanger.

A monolithic substrate including a silica material fused to bulk copper is provided for coupling with electronic components, along with methods for making the same. The method includes arranging a base mixture in a die mold. The base mixture includes a bottom portion with copper micron powder and an upper portion with copper nanoparticles. The method includes arranging a secondary mixture on the upper portion of the base mixture. The secondary mixture includes a bottom portion with silica-coated copper nanoparticles and an upper portion with silica nanoparticles. The method includes heating and compressing the base mixture and the secondary mixture in the die mold at a temperature, pressure, and time sufficient to sinter and fuse the base mixture with the secondary mixture to form a monolithic substrate. The resulting monolithic substrate defines a first major surface providing thermal conductivity, and a second major surface providing an electrically resistive surface.

A system and method of using electrochemical additive manufacturing to add interconnection features, such as wafer bumps or pillars, or similar structures like heatsinks, to a plate such as a silicon wafer. The plate may be coupled to a cathode, and material for the features may be deposited onto the plate by transmitting current from an anode array through an electrolyte to the cathode. Position actuators and sensors may control the position and orientation of the plate and the anode array to place features in precise positions. Use of electrochemical additive manufacturing may enable construction of features that cannot be created using current photoresist-based methods. For example, pillars may be taller and more closely spaced, with heights of 200 μm or more, diameters of 10 μm or below, and inter-pillar spacing below 20 μm. Features may also extend horizontally instead of only vertically, enabling routing of interconnections to desired locations.

A method includes forming a package, which includes forming a plurality of redistribution lines over a carrier, and forming a thermal dissipation block over the carrier. The plurality of redistribution lines and the thermal dissipation block are formed by common processes. The thermal dissipation block has a first metal density, and the plurality of redistribution lines have a second metal density smaller than the first metal density. The method further includes forming a metal post over the carrier, placing a device die directly over the thermal dissipation block, and encapsulating the device die and the metal post in an encapsulant. The package is then de-bonded from the carrier.

A semiconductor package structure includes an interposer substrate formed over a package substrate. The structure also includes a die disposed over the interposer substrate. The structure also includes a first heat spreader disposed over the package substrate. The structure also includes a second heat spreader disposed over the die and connected to the first heat spreader. The coefficient of thermal expansion (CTE) of the first heat spreader and the coefficient of thermal expansion of the second heat spreader are different.

The present disclosure provides a semiconductor structure. The semiconductor structure includes a substrate, a die stack disposed over the substrate, a heat spreader disposed over the substrate and having a surface facing the substrate, and a thermal interface material (TIM) disposed between the die stack and the heat spreader. A bottommost die of the die stack includes a surface exposed from remaining dies of the die stack from a top view perspective; and the TIM is in contact with the exposed surface of the bottommost die and the surface of the heat spreader, and is in contact with a sidewall of at least one of the plurality of dies of the die stack.