Patent classifications
H01L27/14612
IMAGING DEVICE
An imaging device includes a counter electrode, a photoelectric conversion layer that converts light into a signal charge, a plurality of sets of electrodes each of which collects the signal charge, each of the plurality of sets including a first electrode included in a high-sensitivity pixel and a second electrode included in a low-sensitivity pixel, and an auxiliary electrode which is located, as seen in plan view, between the first electrode and the second electrode in each of the plurality of sets and which is commonly included in the high-sensitivity pixel and the low-sensitivity pixel. The distance between the first electrode and the auxiliary electrode is different from the distance between the second electrode and the auxiliary electrode.
ADJUSTABLE WELL CAPACITY PIXEL FOR SEMICONDUCTOR IMAGING SENSORS
An imaging pixel design is provide with a photo-sensor block structure that facilitates dynamic control of well capacity in the photodiode region (i.e., a “well capacity adjustment (WCA) gate photo-sensor block”). The photodiode region includes a doped well in which photocharge is accumulated responsive to exposure to incident illumination. The capacity of the well corresponds to a well potential. WCA structures (e.g., deep trench regions) form walls at least partially surrounding and capacitively coupling with the doped well, such that biasing of the WCA structures changes the well potential and the corresponding well capacity. As such, the WCA structures can be biased during integration to increase the well potential to a high level for large well capacity, and the WCA structures can be differently biased during photocharge transfer to decrease the well potential to a sufficiently low level that avoids lag and/or other conventional concerns.
Image sensors with multi-channel type transistors
A pixel includes a photodiode and first and second transistors, the first and second transistors being coupled in series. One of the first and second transistors is a P channel transistor and the other is an N channel transistor. An electronic device may include one or more of the pixels.
IMAGE SENSOR INTEGRATED CHIP AND METHOD FOR FORMING THE SAME
The disclosure provides an image sensor integrated chip and a method for forming the same. The image sensor integrated chip includes a substrate, an isolation structure, an image sensing element, a gate structure, a first dielectric layer, and a reflective layer. The substrate includes a pixel region. The isolation structure is disposed in the substrate and is configured at opposite sides of the pixel region. The image sensing element is disposed in the pixel region of the substrate. The gate structure is disposed on the pixel region of the substrate. The first dielectric layer is disposed above the pixel region of the substrate and covers sidewalls and a portion of a top surface of the gate structure. The reflective layer is disposed on the first dielectric layer. The reflective layer overlaps with the image sensing element and the portion of the top surface of the gate structure in a first direction perpendicular to a surface of the substrate.
Imaging device and imaging system
An imaging device including pixels including a first pixel and a second pixel, the pixels arranged in rows and columns, the first pixel belonging to a first column, the second pixel belonging to a second column adjacent the first column; a first signal path through which a signal from the first pixel flows; and a second signal path through which a signal from the second pixel flows, a first circuit including first and second lines, a first voltage being applied to the first lines, a second voltage different from the first voltage applied to the second lines. The first signal path is located in a region closer to one of the first lines than any of the second lines in a plan view, and the second signal path is located in a region closer to one of the second lines than any of the first lines in the plan view.
PHOTOELECTRIC CONVERSION APPARATUS AND PHOTOELECTRIC CONVERSION SYSTEM
Photoelectric conversion apparatus including semiconductor layer includes pixel array region and peripheral region. The semiconductor layer has first and second faces. Each pixel includes first semiconductor region of first conductivity type arranged on the first face side and second semiconductor region of second conductivity type arranged on the second face side, and predetermined voltage causing avalanche multiplication operation is supplied between the first semiconductor region and the second semiconductor region. The peripheral region includes third semiconductor region of the first conductivity type arranged on the first face side, fourth semiconductor region of the second conductivity type arranged apart from the third semiconductor region, and fifth semiconductor region of the first conductivity type arranged, close to the third semiconductor region, between the third semiconductor region and the fourth semiconductor region.
PHOTOELECTRIC CONVERSION DEVICE, PHOTOELECTRIC CONVERSION SYSTEM, AND EQUIPMENT
A photoelectric conversion device includes a connecting portion that electrically connects a contact plug of anode wiring and the second semiconductor region of the isolation portion. The connecting portion includes a third semiconductor region of the second conducting type that is connected to the contact plug of the anode wiring, and a fourth semiconductor region of the second conducting type that is disposed between the third semiconductor region and the second semiconductor region. The impurity concentration of the third semiconductor region is higher than the impurity concentration of the second semiconductor region and the impurity concentration of the fourth semiconductor region is lower than the impurity concentration of the third semiconductor region. With respect to a direction in which the APDs are arrayed, the width of the isolation portion is smaller than the width of the connecting portion.
VERTICAL TRANSFER STRUCTURES
Pixels, such as for image sensors and electronic devices, include a photodiode formed in a semiconductor substrate, a floating diffusion, and a transfer structure selectively coupling the photodiode to the floating diffusion. The transfer structure includes a transfer gate formed on the semiconductor substrate, and a vertical channel structure including spaced apart first doped regions formed in the semiconductor substrate between the transfer gate and the photodiode. Each spaced apart first doped region is doped at a first dopant concentration with a first-type dopant. The spaced apart first doped regions are formed in a second doped region doped at a second dopant concentration with a second-type dopant of a different conductive type.
PHOTOELECTRIC CONVERSION APPARATUS AND PHOTOELECTRIC CONVERSION SYSTEM
A photoelectric conversion apparatus includes a first semiconductor layer having a photoelectric conversion element, a second semiconductor layer including circuitry for processing a signal based on a charge obtained by the photoelectric conversion element, a first wiring structure electrically connected to the first semiconductor layer, a second wiring structure electrically connected to the second semiconductor layer, and a coupling part that couples the first wiring structure to the second wiring structure. In a plan view, the apparatus includes a pixel region having the photoelectric conversion element, and a peripheral region located between the pixel region and an outer edge of the photoelectric conversion apparatus. The first wiring structure includes, in the peripheral region, a first conductive part having a mesh-shaped part. The first conductive part is connected to a pad facing outside the photoelectric conversion apparatus.
IMAGE PROCESSING DEVICE FOR CONTROLLING PIXEL OUTPUT LEVEL AND OPERATING METHOD THEREOF
An image sensor includes a pixel array that includes a first pixel group located in a first row and including a first select transistor and a first floating diffusion region, a second pixel group located in a second row and including a second select transistor and a second floating diffusion region, and a column line connected to both the first pixel group and the second pixel group. While charges generated by a photoelectric conversion element of the first pixel group are transferred to the first floating diffusion region, the first select transistor is turned off, the second select transistor is turned on, and a first voltage is applied to the column line through the second select transistor. A photoelectric conversion element of the second pixel group generates charges prior to the photoelectric conversion element of the first pixel group, so as to be transferred to the second floating diffusion region.