Patent classifications
H01L27/14647
IMAGING ELEMENT, STACKED-TYPE IMAGING ELEMENT, IMAGING APPARATUS, AND MANUFACTURING METHOD OF IMAGING ELEMENT
An imaging element which is formed by sequentially stacking at least an anode, an anode-side buffer layer, a photoelectric conversion layer, and a cathode, in which the anode-side buffer layer includes a material having structural formula
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in which thiophene and carbazole are combined.
Imaging element, laminated imaging element, and solid-state imaging device
An imaging element includes a photoelectric conversion unit formed by laminating a first electrode 21, a photoelectric conversion layer 23A, and a second electrode 22. Between the first electrode 21 and the photoelectric conversion layer 23A, a first semiconductor material layer 23B.sub.1 and a second semiconductor material layer 23B.sub.2 are formed from the first electrode side, and the second semiconductor material layer 23B.sub.2 is in contact with the photoelectric conversion layer 23A. The photoelectric conversion unit further includes an insulating layer 82 and a charge accumulation electrode 24 disposed apart from the first electrode 21 so as to face the first semiconductor material layer 23B.sub.1 via the insulating layer 82. When the carrier mobility of the first semiconductor material layer 23B.sub.1 is represented by μ.sub.1, and the carrier mobility of the second semiconductor material layer 23B.sub.2 is represented by μ.sub.2, μ.sub.2<μ.sub.1 is satisfied.
PHOTODIODE, PHOTODIODE ARRAY, AND SOLID-STATE IMAGING DEVICE
A photodiode that multiplies a charge generated by photoelectric conversion in an avalanche region includes: a p− type semiconductor layer having interfaces; an n+ type semiconductor region located inside the p− type semiconductor layer and in contact with the interface; an n+ type semiconductor region located inside the p− type semiconductor layer and connected to the n+ type semiconductor region; and a p type semiconductor region located between the n+ type semiconductor region and the interface, wherein the n+ type semiconductor region, the n+ type semiconductor region, and the p type semiconductor region each have a higher impurity concentration than the p− type semiconductor layer, the avalanche region is a region between the n+ type semiconductor region and the p type semiconductor region inside the p− type semiconductor layer, and the n+ type semiconductor region has a smaller area than the n+ type semiconductor region in planar view.
VOLTAGE BIASED METAL SHIELDING AND DEEP TRENCH ISOLATION FOR BACKSIDE ILLUMINATED (BSI) IMAGE SENSORS
A backside illuminated (BSI) image sensor for biased backside deep trench isolation (BDTI) and/or biased backside shielding is provided. A photodetector is arranged in a semiconductor substrate, laterally adjacent to a peripheral opening in the semiconductor substrate. An interconnect structure is arranged under the semiconductor substrate. A pad structure is arranged in the peripheral opening, and protrudes through a lower surface of the peripheral opening to the interconnect structure. A conductive layer is electrically coupled to the pad structure, and extends laterally towards the photodetector from over the pad structure. A method for manufacturing the BSI image sensor is also provided.
PHOTOELECTRIC CONVERSION ELEMENT AND SOLID-STATE IMAGING APPARATUS
A photoelectric conversion element according to an embodiment of the present disclosure includes: a first electrode; a second electrode opposed to the first electrode; and an organic photoelectric conversion layer provided between the first electrode and the second electrode and formed using a plurality of materials having average particle diameters different from each other, the plurality of materials including at least fullerene or a derivative thereof, and a particle diameter ratio, of a first material having a smallest average particle diameter among the plurality of materials with respect to a second material having a largest average particle diameter among the plurality of materials, is 0.6 or less.
SOLID-STATE IMAGING DEVICE AND IMAGING APPARATUS
A solid-state imaging device has a first substrate and a second substrate. The first substrate has a plurality of first photoelectric conversion units. The second substrate has a second semiconductor layer. The second semiconductor layer has a plurality of second photoelectric conversion units. A first dimension of a first range is smaller than a second dimension of a second range. The first range is the entirety of the second photoelectric conversion unit. The first dimension is a dimension of the first range in a direction parallel to a main surface of the second substrate. The second range is a range in which the second light is incident in the second semiconductor layer. The second dimension is a dimension of the second range in the direction parallel to the main surface of the second substrate.
Solid-state imaging element, method for manufacturing solid-state imaging element, and electronic apparatus
Provided is a solid-state imaging element including a plurality of pixels that includes at least two phase difference detection pixels for focus detection. Each pixel has a stacked structure including a plurality of photoelectric conversion elements that are stacked on top of each other and absorb light beams different in wavelength from one another to generate electrical charges, and each phase difference detection pixel includes, in the stacked structure, a color filter that partially covers an upper face of one of the photoelectric conversion elements and absorbs a light beam with a specific wavelength.
SPAD image sensor and associated fabricating method
A single photon avalanche diode (SPAD) image sensor is disclosed. The SPAD image sensor includes: a substrate having a front surface and a back surface; wherein the substrate includes a sensing region, and the sensing region includes: a common node heavily doped with dopants of a first conductivity type, the common node being within the substrate and abutting the back surface of the substrate; a sensing node heavily doped with dopants of a second conductivity type opposite to the first conductivity type, the sensing node being within the substrate and abutting the front surface of the substrate; and a first layer doped with dopants of the first conductivity type between the common node and the sensing node.
Imaging element and imaging apparatus
An imaging element includes a laminated plurality of photoelectric conversion units, and an input light reflecting unit which reflects light beams input from the plurality of photoelectric conversion units toward directions of the plurality of photoelectric conversion units.
Image sensors with enhanced wide-angle performance
Imaging apparatus (2000, 2100, 2200) includes a photosensitive medium (2004, 2204) and an array of pixel circuits (302), which are arranged in a regular grid on a semiconductor substrate (2002) and define respective pixels (2006, 2106) of the apparatus. Pixel electrodes (2012, 2112, 2212) are connected respectively to the pixel circuits in the array and coupled to read out photocharge from respective areas of the photosensitive medium to the pixel circuits. The pixel electrodes in a peripheral region of the array are spatially offset, relative to the regular grid, in respective directions away from a center of the array.